Semiconductor device and manufacturing method thereof

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...

Reexamination Certificate

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C438S109000

Reexamination Certificate

active

06897091

ABSTRACT:
A semiconductor device having a metal layer at the peripheral area surrounding an element forming area formed on a semiconductor substrate. This metal layer may be connected to the grounding potential or the power potential. The peripheral area is a scribing line area for example. The metal layer may be formed simultaneously with the formation of a bump within the element forming area.

REFERENCES:
patent: 5739546 (1998-04-01), Saitou et al.
patent: 5834829 (1998-11-01), Dinkel et al.
patent: 4-99537 (1992-08-01), None
patent: 7-212169 (1995-08-01), None
patent: 7-326797 (1995-12-01), None
patent: 9-266210 (1997-10-01), None

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