Semiconductor device and manufacturing method thereof

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum

Reexamination Certificate

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C257S762000

Reexamination Certificate

active

06870265

ABSTRACT:
In a semiconductor device, after the deposition of an interlayer insulating film is deposited on a substrate on which an element and wiring of a lower layer are provided, a via hole reaching to the wiring and an annular groove reaching to an annular pad are formed in the interlayer insulating film, in the internal element region and in the chip area outer periphery region, respectively. Next, by etching using a photoresist pattern formed on the inetrlayer insulating film as a mask, a larger groove for use in wiring than the via hole is formed in the internal element region. At this time, a portion of the annular groove, positioned in the side portion of the chip area outer periphery region, is filled with a portion of the photoresist pattern, thereby decreasing the amount of Cu and the like released from the bottom of the annular groove.

REFERENCES:
patent: 20020024115 (2002-02-01), Ibnabdeljalil et al.
patent: 20020175415 (2002-11-01), Matsunaga
patent: 63-25951 (1988-02-01), None
patent: 2723559 (1997-11-01), None
patent: P2000-277465 (2000-10-01), None
patent: P 2001-185626 (2001-07-01), None
Patent Abstract of Japan, Publication No. 02125638 A, May 14, 1990 “Semiconductor Integrated Circuit Device”, English Abstract.

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