Semiconductor device and manufacturing method thereof

Active solid-state devices (e.g. – transistors – solid-state diode – With means to control surface effects – Insulating coating

Reexamination Certificate

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C257S211000, C257S758000

Reexamination Certificate

active

06919617

ABSTRACT:
There is disclosed a semiconductor device comprising a first metal wiring buried in a first wiring groove formed, via a first barrier metal, in a first insulating layer formed on a semiconductor substrate, a second insulating layer formed on the first metal wiring, a via plug formed of a metal buried, via a second barrier metal, in a via hole formed in the second insulating layer, a third insulating layer formed on the second insulating layer in which the via plug is buried, and a second metal wiring buried in a second wiring groove formed in the third insulating layer via a third barrier metal having a layer thickness of layer quality different from that of the second barrier metal.

REFERENCES:
patent: 6008127 (1999-12-01), Yamada
patent: 6476491 (2002-11-01), Harada et al.
patent: 2004/0004287 (2004-01-01), Shimizu et al.
patent: 2001-345380 (2001-12-01), None

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