Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal
Reexamination Certificate
2001-04-19
2004-12-28
Pham, Long (Department: 2814)
Semiconductor device manufacturing: process
Making device or circuit responsive to nonelectrical signal
C257S059000, C257S069000, C257S072000
Reexamination Certificate
active
06835586
ABSTRACT:
DETAILED DESCRIPTION OF THE INVENTION
1. Technical Field to which the Invention Belongs
The present invention relates to a semiconductor device having a circuit composed of a thin film transistor (hereinafter referred to as TFT). For example, the invention relates to an electro-optical device represented by a liquid crystal display panel and to electronic equipment mounted with the electro-optical device as a component.
In this specification, a semiconductor device refers to a device in general that utilizes semiconductor characteristics to function, and electro-optical devices, semiconductor circuits, and electronic equipment are semiconductor devices.
2. Prior Art
A thin film transistor (hereinafter referred to as TFT) can be formed on a transparent glass substrate, and hence its application to an active matrix liquid crystal display (hereinafter referred to as AM-LCD) has been developed actively. A TFT utilizing a crystalline semiconductor film (typically, a polysilicon film) can provide high mobility, making it possible to integrate functional circuits on the same substrate for high definition image display.
An active matrix liquid crystal display device requires million TFTs for pixels alone when the screen is to have high definition. Its functional circuits also need TFTs to further increase the number of required TFTs. Each of these TFTs has to have secured reliability and operate stably in order to realize stable operation of the liquid crystal display device.
However, the TFT is considered as not so equal in terms of reliability to a MOSFET that is formed on a single crystal semiconductor substrate. The TFT experiences lowering of mobility and ON current when it is operated for a long period of time, as the MOSFET suffers from the same phenomena. One of causes of the phenomena is characteristic degradation due to hot carriers that accompany enlargement of a channel electric field.
The MOSFET, on the other hand, has the LDD (lightly doped drain) structure as a well-known reliability improving technique. This structure adds a low concentration impurity region inside a source drain region. The low concentration impurity region is called an LDD region. Some TFTs employ the LDD structure.
Another known structure for the MOSFET is to make the LDD region somewhat overlap a gate electrode with a gate insulating film sandwiched therebetween. This structure can be obtained in several different modes. For example, structures called GOLD (Gate-drain overlapped LDD) and LATID (Large-tilt-angle implanted drain) are known. The hot carrier withstandingness can be enhanced by these structures.
There have been attempts to apply these structures for MOSFETs to TFTs. However, application of the GOLD structure (in this specification, a structure having an LDD region to which a gate voltage is applied is called a GOLD structure whereas a structure having merely an LDD region to which a gate voltage is not applied is called an LDD structure) to a TFT has a problem of OFF current (current flowing when the TFT is in an OFF state) being larger than in the LDD structure. For that reason, the GOLD structure is not suitable for a circuit in which OFF current should be as small as possible, such as a pixel matrix circuit of an AM-LCD.
[Problems to be Solved by the Invention]
An object of the present invention is to provide an AM-LCD having high reliability by constructing circuits of the AM-LCD from TFTs having different structures to suit the respective functions of the circuits. The invention aims to accordingly enhance the reliability of a semiconductor device (electronic equipment) having this AM-LCD.
[Means for Solving the Problems]
According to a structure of the present invention disclosed in this specification, a semiconductor device including a CMOS circuit formed by n-channel TFT and p-channel TFT, characterized in that:
the CMOS circuit has a structure that an active layer is sandwiched by a first wiring line and a second wiring line through an insulating layer in the n-channel TFT,
the active layer includes a low concentration impurity region that is in contact with the channel formation region; and
the low concentration impurity region is formed to overlap the first wiring line and not to overlap the second wiring line.
According to another structure of the present invention, a semiconductor device including a CMOS circuit formed by n-channel TFT and p-channel TFT, characterized in that:
the CMOS circuit has a structure that an active layer is sandwiched by a first wiring line and a second wiring line through an insulating layer in the n-channel TFT and the p-channel TFT; and
the active layer of the n-channel TFT includes a low concentration impurity region that is in contact with the channel formation region; and
the low concentration impurity region is formed to overlap the first wiring line and not to overlap the second wiring line.
In the above structures, the first wiring line of the n-channel TFT is electrically connected with the second wiring line preferably. Thus, a first wiring line and a second wiring line can be in the same electric potential.
In the above structures, the first wiring line and/or the second wiring line can use a conductive film mainly containing an element selected from the group consisting of tantalum (Ta), chromium (Cr), titanium (Ti), tungsten (W), molybdenum (Mo), and silicon (Si), or an alloy film or silicide film containing the above elements in combination. And their films may be use by laminating.
According to another structure of the present invention, a semiconductor device having a pixel matrix circuit that includes a pixel TFT and a storage capacitor formed in n-channel TFT, characterized in that:
the pixel TFT has a structure that an active layer is sandwiched by a first wiring line and a second wiring line through an insulating layer,
the active layer includes a low concentration impurity region that is in contact with the channel formation region; and
the low concentration impurity region is formed to overlap the first wiring line and not to overlap the second wiring line.
The storage capacitor is formed between the first wiring line, the first insulating layer and the active layer. It can be said that a light-shielding layer is used as an electrode of the storage capacitor because the first wiring line functions as the light-shielding layer. Thus, it is effective for improving the aperture ratio of the pixel to use the wiring line formed below the active layer as an electrode to form the storage capacitor.
The first wiring line may be kept at the floating electric potential, but preferably at the lowest power supply electric potential. This makes it possible to use as a light-shielding layer without influencing on an action of the pixel TFT.
According to another structure of the present invention, a semiconductor device having a pixel matrix circuit and a driver circuit that are formed on the same substrate, characterized in that:
a pixel TFT included in the pixel matrix circuit and an n-channel TFT included in the driver circuit have a structure that an active layer is sandwiched by a first wiring line and a second wiring line through an insulating layer; and
the first wiring line connected to the pixel TFT is kept at the lowest power supply electric potential, and the first wiring connected to the n-channel TFT included in the driver circuit is kept at the same level of electric potential as the second wiring line connected to the n-channel TFT included in the said driver circuit.
In the above structures, the active layer includes a low concentration impurity region that is in contact with the channel formation region and the low concentration impurity region is formed to overlap the first wiring line and not to overlap the second wiring line.
According to another structure of the present invention, manufacturing method of a semiconductor device including a CMOS circuit formed by n-channel TFT and p-channel TFT comprising:
a process of forming a first wiring line on a substrate,
a process of forming a first insulating
Ohtani Hisashi
Yamazaki Shunpei
Costellia Jeffrey L.
Ha Nathan W.
Nixon & Peabody LLP
Pham Long
Semiconductor Energy Laboratory Co,. Ltd.
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