Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Patent
1996-12-03
1999-04-06
Saadat, Mahshid D.
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified configuration
257773, 257666, H01L 2348, H01L 2352, H01L 2940
Patent
active
058922865
ABSTRACT:
To form a plurality of patterned conductor leads in the same layer of an integrated circuit, an insulating film is etched to form a plurality of patterned grooves by plasma etching using an etching gas containing carbon and fluorine to which an additive gas containing carbon is added. The etching rate is substantially proportional to the groove width, so that the groove depth is substantially proportional to the groove width. Grooves are filled with a conductive material to form patterned conductor leads. Thus, an aspect ratio of the patterned conductor leads is kept in a certain range, resulting in an improvement in yield and reliability of the conductor leads. The conductor leads formed of material containing copper are coated with a diffusion preventive film.
REFERENCES:
patent: 4847674 (1989-07-01), Sliwa et al.
patent: 4944836 (1990-07-01), Beyer etal.
patent: 5306665 (1994-04-01), Manabe
patent: 5530285 (1996-06-01), Brenndoefer
"Advanced Metallization for ULSI Applications in 1993", Materials Research Society, 1993, Favreau et al., pp. 1-11.
"Wiring Technique of High Speed Processing Device", The 41st VLSI FORUM Report, Nov. 28, 1995.
Fukada Tetsuo
Hasegawa Makiko
Mori Takeshi
Toyoda Yoshihiko
Clark S. V.
Mitsubishi Denki & Kabushiki Kaisha
Saadat Mahshid D.
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