Semiconductor device and manufacturing method thereof

Details Semiconductor device and manufacturing method thereof Semiconductor device and manufacturing method thereof

2011-08-16

2011-08-16

Smith, Matthew (Department: 2823)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified configuration

C257S758000, C257SE23145, C257SE23151

Reexamination Certificate

active

07999393

ABSTRACT:
A semiconductor device includes a plurality of first interconnection layers which are provided in an insulating layer and formed in a pattern having a width and space smaller than a resolution limit of an exposure technique, and a second interconnection layer which is provided between the first interconnection layers in the insulating layer and has a width larger than that of a first interconnection layer. A space between the second interconnection layer and each of first interconnection layers adjacent to both sides of the second interconnection layer equals the space between the first interconnection layers.

REFERENCES:
patent: 4322821 (1982-03-01), Lohstroh et al.
patent: 2005/0122768 (2005-06-01), Fukumoto
patent: 2005/0124103 (2005-06-01), Gil
patent: 2007/0003881 (2007-01-01), Ito et al.
patent: 2011/0001243 (2011-01-01), Sel et al.
patent: 6-181164 (1994-06-01), None
patent: 8-55920 (1996-02-01), None
patent: 2008-34789 (2008-02-01), None

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