Semiconductor device and manufacturing method thereof

Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Forming base region of specified dopant concentration profile

Reexamination Certificate

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C257S592000, C257S607000, C257S077000

Reexamination Certificate

active

07378325

ABSTRACT:
A high voltage semiconductor device having a high current gain hFE is formed with a collector region (20) of a first conduction type, an emitter region (40) of the first conduction type, and a base region (30) of a second conduction type opposite to the first conduction type located between the collector region and the emitter region. The free carrier density of the base region (30) where no depletion layer is formed is smaller than the space charge density of a depletion layer formed in the base region (30).

REFERENCES:
patent: 6737722 (2004-05-01), Yamamoto et al.
patent: 7071536 (2006-07-01), Kaneko et al.
patent: 7132701 (2006-11-01), Kordesch et al.
Yi. Tang et al., “Improvement and Analysis of Implanted-Emitter Bipolar Junction Transistors In 4H-SiC”, Materials Science Forum vols. 389-393 (2002), pp. 1329-1332.

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