Semiconductor device and manufacturing method therefor

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357 67, H01L 2354

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active

050289810

ABSTRACT:
To cover a conductive interconnection (2) of a semiconductor device (1) at high speed with an insulating film (3) having good step coverage, a conductive dummy pattern (8) is provided around the interconnection (2) in spaced relationship therewith. The dummy pattern (8) and interconnection (2) are then covered with insulating film 3 using the bias sputtering method. The dummy pattern (8) and interconnection (2) are preferably applied simultaneously to the substrate using a single mask.

REFERENCES:
patent: 3868723 (1975-02-01), Lechaton et al.
patent: 4524508 (1985-06-01), Sato
"Modified Polysilicon Emitter Process"--Barson--IBM Technical Disclosure Bulletin--vol. 22, No. 9, Feb. 1980, pp. 4052-4053.
Patent Abstracts of Japan, vol. 9, No. 61, Mar. 19, 1985, "Manufacture of Wiring Structure", Tooru Mogami.

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