Semiconductor device and manufacturing method therefor

Details Semiconductor device and manufacturing method therefor Semiconductor device and manufacturing method therefor

1997-09-09

1999-10-05

Powell, William

Semiconductor device manufacturing: process

Chemical etching

Combined with the removal of material by nonchemical means

438697, 438737, 257752, 257759, 257760, 257784, H01L 2100

Patent

active

059623411

ABSTRACT:
A prescribed region of a polyacetylene film that is provided on the flattened surface of a first interlayer insulating film is doped so as to form an upper wiring layer on the polyacetylene film. A second interlayer insulating film which covers this polyacetylene film has a flattened surface which is formed by lamination of a polyimide film onto a silicon oxide film. A via hole is filled with a contact plug that is formed by a conductive polyacetylene film, and a prescribed region of a polyacetylene film that covers the second interlayer insulating film is doped to form an upper wiring layer of that polyacetylene film.

REFERENCES:
patent: 4702792 (1987-10-01), Chow et al.
patent: 5266446 (1993-11-01), Chang et al.
patent: 5691219 (1997-11-01), Kawakubo et al.

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