Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Reexamination Certificate
2007-12-11
2007-12-11
Clark, S. V. (Department: 2823)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
C438S108000
Reexamination Certificate
active
11353192
ABSTRACT:
The invention realizes excellent electrical and mechanical connection between electrodes in a packaging structure where a plurality of semiconductor chips having electrodes are connected with each other through the low-melting metallic members. Bump electrodes are formed on a front surface of a first semiconductor chip. Penetrating holes are formed in a second semiconductor chip, and a penetrating electrode having a gap in a center is formed in each of the penetrating holes. Low-melting metallic members are interposed between connecting surfaces of the bump electrodes and the penetrating electrodes, and a part of each of the low-melting metallic members flows in each of the gaps of the penetrating electrodes when dissolved. This prevents short-circuiting between the bump electrodes which is caused by oversupplying the low-melting metallic members between the adjacent bump electrodes.
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Tanida Kazumasa
Umemoto Mitsuo
Clark S. V.
Morrison & Foerster / LLP
Rohm & Co., Ltd.
Sanyo Electric Co,. Ltd.
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