Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Insulative housing or support
Reexamination Certificate
2006-06-20
2006-06-20
Pham, Hoa (Department: 2814)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Insulative housing or support
C257S734000, C257S735000, C257S736000
Reexamination Certificate
active
07064015
ABSTRACT:
An interposer has a connection electrode formed on the insulating substrate surface, and a solder bump connects with the connection electrode. The insulating substrate surface is made rough where unevenness is formed, and the connection electrode peelable from the insulating substrate surface in a region with which the solder bump is connected by coating surface low active agent.
REFERENCES:
patent: 5703405 (1997-12-01), Zeber
patent: 6316288 (2001-11-01), Hashimoto
patent: 2003/0057570 (2003-03-01), Ball
patent: 63-177434 (1988-07-01), None
patent: 64-50539 (1989-02-01), None
patent: 1-155633 (1989-06-01), None
patent: 1-303731 (1989-12-01), None
patent: 2000-294598 (2000-02-01), None
patent: 2000-68408 (2000-03-01), None
patent: 2000-164635 (2000-06-01), None
patent: 2001-85567 (2001-03-01), None
Ha Nathan W.
NEC Electronics Corporation
Pham Hoa
Young & Thompson
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