Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – With textured surface
Patent
1993-10-14
1995-02-28
Wojciechowicz, Edward
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
With textured surface
257753, H01L 2348, H01L 2944, H01L 2952, H01L 2960
Patent
active
053940121
ABSTRACT:
Source/drain diffusion regions are formed at a surface of a silicon substrate, which is substantially flat and has a first surface roughness. Surfaces of the source/drain diffusion regions are covered with a polysilicon film having a surface which has a second surface roughness larger than the first surface roughness. The polysilicon film is removed by etching to expose the surfaces of the source/drain diffusion regions. Owing to this etching for removal, the surfaces of the source/drain diffusion regions have a third surface roughness larger than the first surface roughness.
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"Rugged Surface Poly-Si Electrode and Low Temperature Deposited Si.sub.3 N.sub.4 for 64MBit and Beyond STC DRAM Cell", Yoshimaru et al., pp. 659-662, '90 IEDM Tech. Dig.
Clark S. V.
Mitsubishi Denki & Kabushiki Kaisha
Wojciechowicz Edward
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