Semiconductor device and manufacturing method of...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum

Reexamination Certificate

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C257S211000, C257S759000, C257S760000, C257SE21016, C257SE21017, C257SE21018, C257SE21019, C257SE21020, C257SE21021, C257SE21507, C257SE21575, C257SE21576, C257SE21577, C257SE21579, C257SE21584, C257SE21627, C257SE21641

Reexamination Certificate

active

07847405

ABSTRACT:
In one aspect of the present invention, a semiconductor device may include an inter-wiring dielectric film in which a wiring trench is formed, a metal wiring layer formed in the wiring trench in the inter-wiring dielectric film, a first barrier layer formed on a side surface of the wiring trench, the first barrier layer being an oxide film made from a metal different from a main constituent metal element in the wiring layer, a second barrier layer formed on a side surface of the wiring layer, the second barrier layer having a Si atom of the metal used in the wiring layer, and a gap formed between the first barrier layer and the second barrier layer.

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Self-Formed Barrier Technology using CuMn Alloy Seed for Copper Dual-Damascene Interconnect with porous-SiOC/porous-PAr Hybrid Dielectric, T. Watanabe, et al., Jun. 4, 2007.
Conference Proceedings AMC XXII © 2007 Materials Research Society, High Performance Ultra-Low-k (k=2.0/keff=2.4) Hybrid Dielectric/Cu Dual-Damascene Interconnects with Selective Barrier Layer for 32 nm-node, Y. Hayashi, et al. Oct. 17, 2006, p. 263-269.
U.S. Appl. No. 12/332,583, filed Dec. 11, 2008, Watanabe, et al.

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