Active solid-state devices (e.g. – transistors – solid-state diode – With specified dopant – Deep level dopant
Reexamination Certificate
2002-01-30
2004-03-16
Kielin, Erik J. (Department: 2813)
Active solid-state devices (e.g., transistors, solid-state diode
With specified dopant
Deep level dopant
Reexamination Certificate
active
06707131
ABSTRACT:
BACKGROUND TO THE PRESENT INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and a manufacturing method for the same. In particular, the present invention relates to a semiconductor device that is used as a rectifying device and employs a pn junction. The present invention also relates to a manufacturing method for the same.
2. Description of the Related Art
In general, semiconductor devices used in high frequency switching, employ high speed recovery diodes. These diodes have a pn junction between a P type semiconductor region and an N type semiconductor region. The lifetime of the carrier is shortened by the diffusion of a heavy metal, such as platinum, known as a ‘lifetime killer.’
Referring now to
FIG. 21
, a longitudinal cross-section of a high speed recovery diode includes an N type semiconductor substrate
11
. An N type semiconductor layer
12
has a lower carrier density than semiconductor substrate
11
.
Semiconductor layer
12
is formed on top of semiconductor substrate
11
by epitaxial growth. An Active region
13
and a guard ring region
14
are formed by patterning an oxide film
15
, layered on top of semiconductor layer
12
, and using oxide film
15
as a mask, P-type impurities are ion injected. After the ion injection, the surface of semiconductor layer
12
is again covered by oxide film
15
through heat treatment. A section of oxide film
15
is removed in order to expose active region
13
. After heat diffusion of platinum, a front electrode
16
is formed on top of active region
13
. A back electrode
17
is formed on the back surface of semiconductor substrate
11
.
The above-described diode is sometimes used in power factor improvement circuits (PFC). In general, diodes used for this purpose must have soft recovery characteristics in which the reverse recovery current is small and the current attenuation factor after the peak of the reverse current during reverse recovery is small.
When the reverse recovery current is large, this leads to an undesirable increase in the turn on loss for a MOS transistor frequently used as a switching element on the power factor improvement circuit (PFC) and also leads to an undesirable rise in temperature of the element.
If the attrition rate is large, a large voltage noise is generated and added onto the power voltage, and by having this voltage applied to the diode and MOS transistor, the element can be destroyed and errors in the circuit may result.
With the related art pn junction diode shown, there is an attempt to reduce the reverse recovery current by shortening the carrier lifetime by controlling the platinum diffusion conditions. However, there is a ‘tradeoff’ between the forward voltage of the diode and the reverse recovery current, and the forward voltage of the diode increases. Furthermore, controlling the platinum diffusion conditions alone does not solely reduce the attrition rate of the reverse current during reverse recovery. As a result, an adequate soft recovery is not achieved.
In addition to platinum concentration, the thickness of semiconductor layer
12
and the anode carrier concentration are optimizable, but when the thickness of semiconductor layer
12
increases, there is a corresponding increase in the forward voltage, and the tradeoff is worsened.
With pn junction diodes, in which platinum is diffused, as the ‘lifetime killer’ platinum piles up near the surface of the diode in a region and at a depth of several micrometers. Therefore, the beneficial effect of the platinum is not adequate near pn junctions that are deeper than several micrometers. As a result, the improvement in the ‘tradeoff’ is inadequate, and there is little if any improvement in the soft recovery characteristics.
To provide an adequate effect of platinum near the pn junction, the injection amount of platinum may be increased. Unfortunately, if the injection amount is increased, not only does the N-type semiconductor layer become high resistance, but defects are increased due to the high platinum concentration in the P-type active region, resulting in at least an increase in leakage current.
OBJECTS AND SUMMARY OF THE INVENTION
It is an object of the present invention to provide a semiconductor device and manufacturing method for the same which overcomes the drawbacks of the related art noted above.
It is another object of the present invention to provide a semiconductor device and a manufacturing method for the same which provides a diode with high speed as well as soft recovery characteristics.
The present invention relates to a semiconductor device and a manufacturing method for the same wherein a N-type semiconductor layer with a low impurity concentration is grown by epitaxial growth on top of a N-type semiconductor substrate. An oxide film with a desired pattern is formed on the surface of the semiconductor layer. Using the oxide film as a mask, an active region edge and a guard ring region are formed by ion injection. After formation, the portion that forms the active region is exposed, and a paste containing platinum is coated onto the back surface of semiconductor substrate, and heat diffusion of platinum occurs. Through this process, a region near the surface of the active region of semiconductor layer reverses to a P-type, and a reverse region is shallowly formed producing a fast diode with adequate soft recovery characteristics.
According to an embodiment of the present invention, there is provided a semiconductor device, comprising: a semiconductor region being a first conductive type, a reverse region being a second conductive type, the reverse region selected in a first surface of the semiconductor region, the reverse region being formed by platinum doping at a higher concentration near the first surface of the semiconductor region than in an interior portion of the semiconductor region, and the semiconductor region and the reverse region forming a pn junction.
According to another embodiment of the present invention, there is provided a semiconductor device, wherein: at least a first portion of the first surface of the semiconductor region being covered by at least an oxide film, and the reverse region being formed in a first region corresponding to an open window of the oxide film.
According to another embodiment of the present invention, there is provided a semiconductor device, further comprising: at least a first electrode electrically contacting the reverse region, at least a second electrode electrically contacting the semiconductor region, at least one impurity diffusion region being the second conductive type surrounding the reverse region in at least a first zone, and the impurity diffusion region joining the semiconductor region at a second position deeper than a first position of the pn junction.
According to another embodiment of the present invention, there is provided a semiconductor device, further comprising: a plurality of impurity diffusion regions, and an innermost impurity diffusion region, of the plurality of impurity diffusion regions, connecting to the reverse region and the first electrode.
According to another embodiment of the present invention, there is provided a semiconductor device, further comprising: at least a first electrode electrically contacting the reverse region, at least a second electrode electrically contacting the semiconductor region, and a second reverse region surrounding the reverse region and being reversed to the second conductive type by platinum doping at a higher concentration near the first surface of the semiconductor region than the interior.
According to another embodiment of the present invention, there is provided a semiconductor device, wherein: the first electrode additionally electrically contacting the semiconductor region.
According to another embodiment of the present invention, there is provided a semiconductor device, wherein: the first electrode additionally electrically contacting the semiconductor region.
According to another embodiment of the present invention, there is provided a semiconduct
Kitamura Shoji
Matsui Toshiyuki
Darby & Darby
Dolan Jennifer M
Fuji Electric & Co., Ltd.
Kielin Erik J.
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