Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Reexamination Certificate
2006-06-13
2006-06-13
Cao, Phat X. (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
C257S778000
Reexamination Certificate
active
07061097
ABSTRACT:
There is here disclosed a semiconductor device comprising a semiconductor element, a first substrate disposed to face one side of the element, being provided first internal wirings on a main surface, and being provided first external wirings connected to the respective first internal wirings on another main surface, and a second substrate formed to be larger than the element by a material having flexibility, being disposed to face another side of the element, being provided second internal wirings having one-end portions extended to edges of a main surface, and the one-end portions connected to the first internal wirings with being bent toward the first substrate together with the edges, being mounted the element having an electrode connected to some of the second internal wirings on the main surface, and being provided external terminals connected to some of the second internal wirings on a middle of another main surface.
REFERENCES:
patent: 6724061 (2004-04-01), Murata
patent: 6822323 (2004-11-01), Kim et al.
patent: 11-186492 (1999-07-01), None
patent: 2000-68444 (2000-03-01), None
patent: 2001-332681 (2001-11-01), None
patent: 2002-151644 (2002-05-01), None
patent: 2003-86733 (2003-03-01), None
Notification of Reasons for Rejection (Office Action) for Japanese Patent Application No. 2004-006787, mailed Jan. 17, 2006 and English translation thereof.
Cao Phat X.
Doan Theresa T.
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Kabushiki Kaisha Toshiba
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