Semiconductor device and its manufacturing method,...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Beam leads

Reexamination Certificate

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C257S736000, C257S730000, C257S778000, C257SE23039, C438S108000, C438S106000

Reexamination Certificate

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10973989

ABSTRACT:
A semiconductor device is provided having: a board; a metallization pattern formed on the first face of the board; a first layer formed so as to not cover the first portion of the metallization pattern but to cover the second portion; and a semiconductor chip mounted on the first face of the board and electrically connected with the metallization pattern in the first portion. A resin portion is provided between the semiconductor chip and the board and from there onto the first portion of the metallization pattern outside the semiconductor chip so as to not reach a boundary between the first and second portions. A second layer is provided on the second face of the board so as to overlap the boundary of the metallization pattern and not overlap the resin portion.

REFERENCES:
patent: 6208521 (2001-03-01), Nakatsuka
patent: 6507106 (2003-01-01), Hogerl
patent: 6683377 (2004-01-01), Shim et al.
patent: 6841855 (2005-01-01), Jaeck et al.
patent: 56-169568 (1965-05-01), None
patent: 61-117266 (1986-07-01), None
patent: 08-116140 (1996-05-01), None
patent: 11-144403 (1999-05-01), None
patent: 2002-026082 (2002-01-01), None
patent: 2002-289984 (2002-10-01), None
patent: 2003-051648 (2003-02-01), None
patent: 2004-207704 (2004-07-01), None
Communication from Japanese Patent Office re: counterpart application, May 9, 2005.

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