Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – Mesa structure
Patent
1997-10-15
1999-11-09
Thomas, Tom
Active solid-state devices (e.g., transistors, solid-state diode
Physical configuration of semiconductor
Mesa structure
257284, 257192, 257623, H01L 2906, H01L 2980, H01L 310328
Patent
active
059820233
ABSTRACT:
A dummy gate is removed together with an SiO.sub.2 film thereon by lift-off to form a reverse dummy-gate pattern with the SiO.sub.2 film. A photoresist pattern is formed to cover the reverse dummy-gate pattern and an SiN protection film therebetween, and a mesa pattern is formed by mesa etching. The photoresist pattern is etched so that the edge of the photoresist pattern is located between the edge of the mesa pattern and the edge of the reverse dummy-gate pattern and the exposed part of the SiN protection film is etched. The edge of the SiN protection film is thus located inside the edge of the mesa pattern.
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A New Planar TMT Suitable For L-Band MMICs With RF Transmission And Reception Blocks Operating AT Vdd .ltoreq. 2 V; by Minoru SAWADA, et al.; The Japan Society of Applied Physics.
New Planar Two-Mode Channel Field-Effect Transistor Suitable For L-Band Microwave Monolithic Integrated Circuits With RF Transmission And Reception Blocks Operating At Vdd .ltoreq.2 V; by Minoru SAWADA, et al.; Jpn. J. Appl. Phys. vol. 34 (1995) pp. 1168-1171.
Excellent Thermally-Stable Epitaxial Channel For Implanted Planar-Type Hetero-Junction Field-Effect Transistor; by Shigeharu Matsushita, et al.; The Japan Society of Applied Physics.
Excellent Thermally Stable Epitaxial Channel For Implanted Planar-Type Heterojunction Field-Effect Transistors; by Shigeharu Matsushita, et al.; The Japan Society of Applied Physics.
Fujii Emi
Inoue Daijiro
Matsushita Shigeharu
Nadav Ori
Sanyo Electric Co,. Ltd.
Thomas Tom
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