Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2001-06-19
2003-05-20
Dang, Trung (Department: 2823)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C438S431000, C438S432000, C257S505000, C257S510000, C257S520000
Reexamination Certificate
active
06566226
ABSTRACT:
TECHNICAL FIELD
The present invention generally relates to semiconductor devices, and more particularly to a semiconductor device having a shallow trench device isolation (STI) structure and a fabrication process thereof.
In semiconductor integrated circuit devices, a so-called device isolation structure is used for isolating a plurality of device regions formed on a common semiconductor substrate from each other electrically.
In conventional semiconductor integrated circuit devices, a field oxide film formed by a so-called LOCOS process has been used for such a device isolation structure. On the other hand, a field oxide film has a tendency of having an increased area as compared with an area of a device region due to the formation of bird's beak structure that penetrates into the device region and is problematic in view of miniaturization of semiconductor integrated circuit device. Thus, recent semiconductor integrated circuit devices using semiconductor devices of sub-micron size or sub-half-micron size tend to use less area-occupying shallow-trench device isolation (STI) structures, in place of conventional field oxide films.
BACKGROUND ART
FIG. 1
shows the construction of a semiconductor device
10
having an STI structure according to a related art of the present invention.
Referring to
FIG. 1
, the semiconductor device
10
is formed on a device region defined on a p-type Si substrate
11
by a device isolation region
12
having the STI structure, and n-type diffusion regions
11
a
-
11
c
having an LDD structure are formed in the Si substrate
11
in correspondence to the device region. The device region is further covered by a gate oxide film
13
and a gate electrode
14
A of a first MOS transistor is formed on the gate oxide film
13
in correspondence to the channel region between the diffusion regions
11
a
and
11
b
. Further, a gate electrode
14
B of a second MOS transistor is formed in correspondence to the channel region between the diffusion regions
11
b
and
11
c.
Each of the gate electrodes
14
A and
14
B is covered by a pair of sidewall oxide films and further by an interlayer insulation film
15
. Further, the interlayer insulation film
15
is formed with contact holes
15
A-
15
C respectively exposing the diffusion regions
11
a
-
11
c
, and the contact holes
15
A-
15
C are filled by polysilicon electrodes
16
A-
16
C, respectively.
As can be seen from
FIG. 1
, the device isolation region
12
of the STI structure is formed of device isolation trenches
11
A and
11
B each formed in the Si substrate
11
and an SiO
2
film filling the device isolation trenches
11
A and
11
B and forming the region
12
. Thus, the device isolation region
12
does not form a bird's beak structure and the area of the device isolation region can be minimized.
FIG. 2
shows the cross section of the semiconductor device
10
of
FIG. 1
taken in a direction perpendicular to the cross-section of
FIG. 1
taken along the gate electrode
14
A. In
FIG. 2
, the representation of the interlayer insulation film
15
or the electrodes
16
A and
16
B is omitted. Further, the illustration of the sidewall oxide film of the gate electrode
14
A is omitted.
Referring to
FIG. 2
, the SiO
2
film forming the STI structure is formed with a depression along the boundary to the Si substrate
11
associated with the etching of a pad oxide film on the Si substrate
11
, and it can be seen that the SiO
2
film forms an edge having an acute angle in such a depression. As a result of the existence of such an edge of acute angle, there is caused a concentration of electric field in the SiO
2
film when a gate voltage is applied to the gate electrode
14
A and there arises a problem that the threshold voltage of the MOS transistor having the gate electrode
14
A is reduced effectively in the vicinity of the edge of the acute angle.
When such a decrease of the effective threshold voltage is caused, the MOS transistor starts to conduct at a gate voltage below the desired threshold voltage as represented in the drain current Id—gate voltage Vg characteristic curve of
FIG. 3
, and there appears a kink in the characteristic curve in which the drain current increases sharply with the increase of the gate voltage.
Further, in such a structure, due to the formation of the depression in the SiO
2
film
12
, there can be a case, when forming the gate electrode
14
A or
14
B by patterning a polysilicon or amorphous silicon, in that an etching residue of polysilicon or amorphous silicon remains in such a depression and causes problems such as short circuit.
In order to avoid the kink of the characteristic curve caused by the electric field concentration in the edge part of the STI structure, there is proposed an STI structure formed according to the process of
FIGS. 4A-4D
in another related art of the present invention.
Referring to
FIG. 4A
, an initial oxide film
23
and a hand mask layer
24
of an SiN film are formed consecutively on a Si substrate
21
and an SiO
2
film
25
is formed further on the SiN film
24
by a high-temperature CVD process. Further, an opening
26
is formed through the films
23
-
25
so as to expose the Si substrate
21
.
Next, in the step of
FIG. 4B
, the structure of
FIG. 4A
is oxidized in a wet atmosphere and a minute LOCOS
27
is formed in correspondence to the opening
26
. Further, a sidewall oxide film
25
A is formed on the sidewall of the opening
26
.
Further, in the step of
FIG. 4C
, the minute LOCOS
27
is subjected to a dry etching process while using the SiN film
24
and the sidewall oxide film
25
A as a mask, to form a trench
21
A so as to reach the Si substrate
21
. Further, the trench
21
A is filled with an SiO
2
film and subsequently applied with an etch back process, and the SiN film
24
is removed. Further, a sidewall oxide film
28
A is formed outside the SiO
2
film thus formed, as represented in FIG.
4
D.
In such an STI structure, no edge part having an acute angle is formed between the Si substrate
21
and the trench
21
A and the problem of decrease of the threshold voltage of the MOS transistor caused by concentration of electric field is avoided.
However, the STI structure having such a construction requires a complex fabricating process and increases the cost of fabrication.
In a further related art of the present invention, there is proposed an STI structure that avoids the problem of electric field concentration with a simpler construction as represented in FIG.
5
.
Referring to
FIG. 5
, a trench
31
A is formed in an Si substrate
31
and the trench
31
A is filled with an SiO
2
film
32
. Further, sidewall insulation films
33
are formed at both lateral sides of a projecting part of the SiO
2
film
32
on the substrate
31
by a deposition and etch-back of an SiO
2
film.
The foregoing process, while being able to form the STI structure by a simple process, has a drawback in that the surface of the Si substrate
31
tends to be contaminated by impurities in relation to the etch-back process of the SiO
2
film.
DISCLOSURE OF THE INVENTION
Accordingly, it is a general object of the present invention to provide a novel and useful semiconductor device and a fabrication process thereof wherein the foregoing problems are eliminated.
Another and more specific object of the present invention is to provide a semiconductor device having an STI structure and is capable of avoiding the concentration of electric field at the edge part of the STI structure effectively and a fabrication process thereof.
Another object of the present invention is to provide a semiconductor device, comprising:
a substrate; and
a device isolation structure formed on said substrate for defining a device region,
said device isolation structure comprising:
a trench formed in said substrate; and
an insulating film filling said trench,
said insulating film including an extension part extending outwardly from an outer edge of said trench on a surface of said substrate, and a projecting part projecting upwardly from said extension part in
Armstrong Westerman & Hattori, LLP
Dang Trung
Fujitsu Limited
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