Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular signal path connections
Reexamination Certificate
1998-06-18
2002-04-30
Prenty, Mark V. (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Gate arrays
With particular signal path connections
C257S659000, C257S758000, C438S622000
Reexamination Certificate
active
06380567
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device including a shield interconnection layer on the upper side from the uppermost one of in-cell interconnection layers provided in a functional cell formed on a semiconductor substrate, and a method of fabricating the semiconductor substrate.
2. Description of the Prior Art
FIG. 6
is a plan view schematically showing a configuration of a semiconductor device according to a first prior art example.
FIG. 7
is a sectional view taken on line VII—VII in FIG.
6
. In
FIGS. 6 and 7
, reference numeral
101
denotes a semiconductor device;
102
denotes a semiconductor substrate;
103
denotes a functional cell, formed on the semiconductor substrate
102
, in which a DRAM, an analog circuit and the like are formed; and
104
denotes a between-cell interconnection layer for connecting the function cell
103
to another functional cell
103
(not shown).
In the functional cell
103
, reference numeral
105
denotes each of in-cell interconnection layers provided in the functional cell
103
;
106
a
denotes a first insulating film formed between the semiconductor substrate
102
and the lowermost in-cell interconnection layer
105
;
106
b
denotes each of second insulating films formed between adjacent ones of the in-cell interconnection layers
105
;
106
c
denotes a third insulating film formed on the uppermost in-cell interconnection layer
105
;
107
a
denotes a contact hole for connecting the semiconductor substrate
102
to the lowermost in-cell interconnection layer
105
; and
107
b
denotes each of through-holes for connecting adjacent ones of the in-cell interconnection layers
105
formed in different layers to each other.
In such a prior art semiconductor device
101
, the between-cell interconnection layer
104
is formed on the third insulating film
106
c
in a region different from a region in which the function cell
103
is formed.
Although in the above description, the interconnection layer formed in a region different from the region in which the functional cell
103
is formed is composed of the between-cell interconnection layer
104
, such an interconnection layer is occasionally composed of an interconnection layer to be connected to an I/O cell, a power supply interconnection layer or a ground interconnection layer. Further, although in the above description, the between-cell interconnection layer
104
is formed on the third insulating film
106
c
, such a between-cell interconnection layer
104
is occasionally formed on another layer.
FIG. 8
is a plan view schematically showing a configuration of a semiconductor device according to a second prior art example.
FIG. 9
is a sectional view taken on line IX—IX in FIG.
8
. In
FIGS. 8 and 9
, reference numeral
111
denotes a semiconductor device;
113
denotes a functional cell, formed on a semiconductor substrate
102
, in which a DRAM, an analog circuit and the like are formed; and
114
denotes a between-cell interconnection layer for connecting the functional cell
113
to another functional cell
113
(not shown).
In the functional cell
113
, reference numeral
116
c
denotes a third insulating film formed between the uppermost one of in-cell interconnection layers
105
and a between-cell interconnection layer
114
; and
116
d
denotes a fourth insulating film formed on the between-cell interconnection layer
114
.
Other components are the same as or similar to those indicated by the same reference numerals in
FIGS. 6 and 7
.
In such a prior art semiconductor device
111
, the between-cell interconnection layer
114
is previously formed on the third insulating film
116
c
in the functional cell
113
.
Although in the above description, the interconnection layer previously formed in the functional cell
113
is composed of the between-cell interconnection layer
114
, such an interconnection layer is occasionally composed of an interconnection layer to be connected to an I/O cell, a power supply interconnection layer or a ground interconnection layer. Further, although in the above description, the between-cell interconnection layer
114
is formed on the third insulating film
116
c
, such a between-cell interconnection layer
114
is occasionally formed on another layer.
Techniques related to the present invention have been disclosed in JP-A-60/224244, JP-A 3/263355, JP-A4/69950, JP-A-63/244877, and JP-A-1/164048; however, either of the techniques fails to disclose features of the present invention which will be described later.
As described above, in the semiconductor device in the first prior art example, since the between-cell interconnection layer
104
or the like is formed in a region different from a region in which the functional cell
103
is formed, there occurs a problem that the between-cell interconnection layer
104
or the like is made longer to thereby cause a delay of an operational speed.
In the semiconductor device in the second prior art example, since the between-cell interconnection layer
114
is previously formed in the functional cell
113
, there occurs a problem that the between-cell interconnection layer
114
or the like cannot be occasionally formed depending on an interconnection structure of the in-cell interconnection layers
105
provided in the functional cell
113
.
SUMMARY OF THE INVENTION
The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a semiconductor device in which a delay of an operational speed is relaxed and a method of fabricating the semiconductor device.
According to a first aspect of the present invention, there is provided a semiconductor device including a functional cell formed on a semiconductor substrate, and a shield interconnection layer which is formed on the upper side from the uppermost one of in-cell interconnection layers provided in the functional cell in such a manner as to cover the functional cell and which is connected to an interconnection layer having a specific potential.
In accordance with the first aspect, the semiconductor device includes a functional cell formed on a semiconductor substrate, and a shield interconnection layer which is formed on the upper side from the uppermost one of in-cell interconnection layers provided in the functional cell in such a manner as to cover the functional cell and which is connected to an interconnection layer having a specific potential, and accordingly, a between-cell interconnection layer or the like can be formed on the upper side from the shield interconnection layer formed in a region in which the function cell is formed. As a result, there can be obtained an effect of shortening the between-cell interconnection or the like, thereby relaxing a delay of an operational speed.
According to a second aspect of the present invention, the shield interconnection layer is formed in such a manner as to cover the entire surface of a region in which the functional cell is formed.
In accordance with the second aspect, since the shield interconnection layer is formed in such a manner as to cover the entire surface of the region in which the functional cell is formed, there can be obtained an effect of allowing a between-cell interconnection or the like to be formed on the upper side from the shield interconnection layer irrespective of an interconnection structure of the in-cell interconnection layers provided in the functional cell. Further, there can be obtained an effect of improving the flatness of an interconnection layer or an insulating film formed on the upper side from the shield interconnection layer.
According to a third aspect of the present invention, the shield interconnection layer is formed in such a manner as to cover the entire surface of a portion, of a region where the functional cell is formed, in which an in-cell interconnection layer for transmitting a sensitive signal is formed.
In accordance with the third aspect, since the shield interconnection layer is formed in such a manner as to c
Burns Doane , Swecker, Mathis LLP
Prenty Mark V.
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