Semiconductor device and fabrication method for the same

Details Semiconductor device and fabrication method for the same Semiconductor device and fabrication method for the same

2011-07-12

2011-07-12

Ngo, Ngan (Department: 2893)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified configuration

C257S412000, C257S616000, C257S368000, C257SE27062, C257SE27012, C257SE27098

Reexamination Certificate

active

07977800

ABSTRACT:
The semiconductor device includes: a transistor having a gate electrode formed on a semiconductor substrate and first and second source/drain regions formed in portions of the semiconductor substrate on both sides of the gate electrode; a gate interconnect formed at a position opposite to the gate electrode with respect to the first source/drain region; and a first silicon-germanium layer formed on the first source/drain region to protrude above the top surface of the semiconductor substrate. The gate interconnect and the first source/drain region are connected via a local interconnect structure that includes the first silicon-germanium layer.

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patent: 2007-150244 (2007-06-01), None
Kimura, Y., et al., “Process integration of 0.248 μm2SRAM Cell for 45 nm Generation”, Extended Abstracts of the 54th Meeting, 2007, p. 931, Japan Society of Applied Physics.

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