Semiconductor device and electronic equipment using the same

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead

Reexamination Certificate

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C257S698000, C257SE23153

Reexamination Certificate

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07109578

ABSTRACT:
Crosstalk is suppressed low even when one surface of a multi-layer board seats a semiconductor integrated circuit of the BGA type and peripheral circuit components. Of a plurality of BGA bumps arranged on the back surface of a semiconductor integrated circuit chip, those BGA bumps (such as a high-frequency signal pin) to which peripheral circuit components need be mounted right close are arranged outer-most, and peripheral circuit components are then mounted right close to these BGA bumps. The BGA bumps one tier inner from the outer-most BGA bumps, which are to be used as grounding terminals, are connected with a wide inner-layer grounding wire pattern. Those BGA bumps (such as a logic control signal pin) to which peripheral circuit components need not be mounted right close are disposed further inward and connected with an inner-layer wire pattern which is located even deeper down from a front layer. This makes the grounding pattern held between the signal wire pattern and the control wire pattern and ensures isolation between these wire patterns, whereby it is possible to suppress leakage of a signal which could cause crosstalk.

REFERENCES:
patent: 5786630 (1998-07-01), Bhansali et al.
patent: 6369443 (2002-04-01), Baba
patent: 6462522 (2002-10-01), Burstein et al.
patent: 6639155 (2003-10-01), Bupp et al.
patent: 2001/0050428 (2001-12-01), Ando et al.
patent: 2003/0047349 (2003-03-01), Boireau
patent: 11097613 (1999-04-01), None
patent: 2003204163 (2003-07-01), None

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