Semiconductor device and control method thereof

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – For fault location

Reexamination Certificate

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C327S327000

Reexamination Certificate

active

06534998

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device for controlling electric power and a control method thereof, and more particularly to a semiconductor device capable of improving stability by optimizing the capacitance of a control terminal and a control method thereof.
Generally, IGBT (Insulated Gate Bipolar Transistor) and IEGT (Injection Enhanced Gate Bipolar Transistor) and the like, which control large power using a control terminal having an MOS structure (hereinafter referred to as a gate), are widely used as semiconductor devices for controlling power.
FIG. 1
is a cross-sectional view of a configuration of this type of IGBT. As
FIG. 1
shows, a collector electrode
2
is formed on a p-type emitter layer
1
, and an n-type base layer
3
is formed on the surface of side which is opposite to the collector electrode
2
. P-type base layers
4
are formed on the surface of the n-type base layer
3
by selective diffusion. N-type source layers
5
are selectively formed in the surfaces of the p-type base layers
4
.
A gate electrode
7
is formed, via a gate insulating film
6
, above the region which extends from one of the n-type source layers
5
, through one p-type base layer
4
, the n-type base layer
3
and the other p-type base layer
4
, to the other n-type source layer
5
. Further, a joint emitter electrode
8
is formed on the p-type base layers
4
and the n-type source layers
5
.
In order to turn the IGBT ON, with a voltage (main voltage) which is positive with respect to the emitter electrode
8
side being applied at the collector electrode
2
side, a voltage, which is positive with respect to the emitter electrode
8
, is applied to the gate electrode
7
. As a result, n-type channels are formed on the surfaces of the p-type base layers
4
, which are sandwiched between the n-type base layer
3
and the n-type source layers
5
, and a current of electrons flows through the n-type base layer
3
. And, positive hole current flows from the p-type emitter layer
1
to the n-type base layer
3
, causing a conductivity modulation in the n-type base layer
3
, whereby the IGBT turns ON.
In order to turn the IGBT OFF, a voltage, which is zero or negative with respect to the emitter electrode
8
, is applied to the gate electrode
7
. The n-type channels are thereby destroyed, ending the injection of electrons to the n-type base layer
3
. As a result, the IGBT turns OFF. In this state, the main voltage is still being applied at the collector electrode
2
side.
When actually manufactured, a plurality of the above type of individually micromachined IGBTs are integrated within a chip. In other words, among the entire plurality of IGBTs integrated in the chip, the IGBT shown in
FIG. 1
constitutes a unit region known as a cell, which consists of two IGBTs corresponding to two ends of one gate electrode
7
. The IGBTs of these cells are integrated in parallel so as to form a chip-shaped IGBT arrangement.
However, in semiconductor devices such as the IGBT described above, there is the danger that the semiconductor device may become unable to control current as a result of instability of the gate voltage V
G
or nonuniformity of the ON current (collector current) in the chip or in the cell. This can lead to breakdown of the IGBT itself.
Instability of the gate voltage V
G
is caused by problems such as noise mixing into the gate circuit, discrepancies in the characteristics of the gate resistors and nonuniformity among the IBGTs.
For instance,
FIG. 2
shows a pair of IGBTs
1
and
2
in the ON state, wherein, when 1V of noise becomes mixed into the 300 W gate resistance of the IGBT
1
for a single moment (approximately 10 nsec), the gate voltage V
G
inclines toward the other IGBT
2
as shown in FIG.
3
. Consequently, as
FIG. 4
shows, the ON current flows only to the IGBT
2
.
The above is only one example of undesired phenomena resulting from noise and the like. Other potential phenomena are oscillation of the gate voltage V
G
and concentration of current within the cell and the like. When the IGBT is operating at high voltage and high current, any of these phenomena is liable to cause breakdown of the IGBT, lowering the reliability of the semiconductor device.
Furthermore, a system of short-circuit protection is conventionally known as a method for improving the reliability of this type of semiconductor device.
FIG. 5
shows a circuit diagram illustrating this short-circuit protection system, and
FIG. 6
, a front view of the outside of this semiconductor device.
The main element of the semiconductor device is a main IGBT element M
1
, which is electrically connected in parallel to a sensing IGBT element S
1
for detecting current, these elements being provided within a single chip. The area ratio of the elements within the chip may be expressed as in the range of 1:100-1000, the sensing IGBT element S
1
being
1
, and the main IGBT element M
1
being 100-1000.
The current flowing to the main IGBT element M
1
is detected from the voltage drop across a resistance Rs which is connected to the emitter of the sensing IGBT element S
1
. In other words, when large current resulting from a short circuit or the like flows into the sensing IGBT element S
1
, there is a voltage drop at the resistance Rs. As
FIG. 5
shows, this voltage drop causes current to flow to the base of a transistor Tr
1
, the collector of which is connected to the gate circuit. Consequently, the transistor Tr
1
turns ON, reducing the gate voltages of the main IGBT element M
1
and the sensing IGBT element S
1
.
However, the above short-circuit protection has the following disadvantages.
When the operating mode changes abruptly, as when the device is turned ON and OFF, the detected current may not always correspond exactly to the current of the whole IGBT chip. As a result, there are many cases where the protection system fails to operate when a short circuit occurs. An additional disadvantage is that manufacturing discrepancies are considerable.
Moreover, since the sensing IGBT element S
1
is provided in the same chip as the main IGBT element M
1
, there is the disadvantage that the effective area of the main IGBT element M
1
is decreased. And, the protection operation tends to be delayed and to suffer from unstable oscillations and the like because the feedback loop from the detection of large current to the gate voltage reduction is so long. Further, once the sensing IGBT element S
1
has been provided, it is extremely difficult to perform adjustments and the like to the protection level. There is also the disadvantage that the semiconductor device has a four-terminal structure, comprising the collector, gate and emitter terminals of the main IGBT element M
1
and the emitter of the sensing IGBT element S
1
. The configuration of the semiconductor device is therefore complex and costs are increased.
Next, the protection of the semiconductor device when turned OFF will be described.
A timechart (a) in
FIG. 7
is showing the change over time of the voltage V
CE
, which is applied to the main IGBT element M
1
, and the current I
CE
, which flows through the main IGBT element M
1
, when the main IGBT element M
1
is turned OFF. A timechart (b) in
FIG. 7
is showing differential versions of the voltage waveforms of (a) in FIG.
7
. In each diagram, a solid line is used to depict the state when gate resistance Rg, which is connected is parallel to the MOS gate circuit, is small, and a broken line depicts the state when the gate resistance Rg is large.
When driven by high-frequency signals, the ON/OFF loss (the product of voltage and current integrated over time) not only at the main IGBT element M
1
but also in the power element must be reduced. Therefore, the gate resistance Rg must be reduced in order to increase the turn-OFF speed. However, as (b) in
FIG. 7
shows, the dV/dt peak value is higher when the time taken to perform turn-OFF is shorter. Here, since the target voltage V
CE
is fixed, the two differential waveforms shown at (b) in
FIG. 7

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