Semiconductor device and circuit board used therein

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead

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Details

257738, 257784, H01L 2348

Patent

active

060842954

ABSTRACT:
A semiconductor chip having electrode terminals arranged in an area-array manner is mounted on an upper surface of a first region of a circuit board. Bonding pads are provided on the upper surface of a second, different region of the circuit board, and are connected to electrode terminals on the upper surface of the chip with bonding wires covered with an electro-insulation coating. External connection terminals provided on an opposing surface of the second region of the circuit board in an area-array manner are electrically connected to the bonding pads by conductive vias provided through the circuit board in the thickness direction. An electro-insulation film covers the chip, including the bonding wire/electrode terminal connections, and the upper surface of the second region of the circuit board. An electro-conductive resin encapsulates the coated bonding wires and the electro-insulation film.

REFERENCES:
patent: 5396104 (1995-03-01), Kimura
patent: 5625222 (1997-04-01), Yoneda et al.
patent: 5640047 (1997-06-01), Nakashima
patent: 5640048 (1997-06-01), Selna
patent: 5656857 (1997-08-01), Kishita
patent: 5767447 (1998-06-01), Dudderar et al.

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