1986-01-02
1988-10-18
James, Andrew J.
357 36, H01L 2908, H01L 29743
Patent
active
047791250
DESCRIPTION:
BRIEF SUMMARY
The present invention relates to a semiconductor device including at least one region of a highly doped material of a first conductivity type embedded in a well of a material of a second conductivity type to allow current flow between said well and said region.
Such a semiconductor device is already known from the article "Insulated-Gate Planar Thyristors: I-Structure and Basic Operation" by J. D. Plummer et al, published in IEEE Transactions on Electronic Devices, Vol. ED-27, No. 2, Feb. 1980, pp. 380-387 and more particularly FIG. 11 thereof.
This known device includes a thyristor comprising a PNP transistor and an NPN transistor which are interconnected between two terminals constituting respective emitters of said transistors, the base-to-emitter junction of the NPN transistor being shunted by a turn-off PMOS transistor and by a so-called pinched trigger resistance. The collector of the PNP transistor, the base of the NPN transistor and the source of the PMOS transistor are constituted by the above mentioned well which comprises P material and the emitter of the NPN transistor is constituted by the above mentioned region which comprises highly doped N material, i.e. N+ material.
In this known device, upon the PMOS transistor being made conductive to turn off the thyristor, current is drawn from the P well below the region of N+ material to the channel and drain of the PMOS transistor, i.e. from the commoned collector of the PNP transistor, the base of the NPN transistor and the source of the PMOS transistor to the channel and drain of this transistor. The current able to be interrupted by this PMOS transistor is reduced because the P well has a relatively high resistance connected in series with the source of the PMOS transistor.
An object of the present invention is to provide a semiconductor device of the above type but which does not present such a drawback, i.e. which permits a higher current to be diverted or turned off.
According to the invention this object is achieved due to the fact that in said well said region is at least partially surrounded by a zone of a highly doped material of said second conductivity type to allow current flow between said well and said zone.
Another characteristic feature of the present semiconductor device is that said well comprises P-material, said region comprises N+ material and said zone comprises P+ material.
A further characteristic of the present invention is that it includes a thyristor comprising a PNP transistor and a NPN transistor which are interconnected between two terminals constituting respective emitters of said transistors, the base-to-emitter junction of said NPN transistor being shunted by a turn-off device, and that the collector of said PNP transistor and the base of said NPN transistor are constituted by said well, the emitter of said NPN transistor is constituted by said region and said zone constitutes an input electrode of said turn-off device.
Due to an input electrode of the turn-off device being constituted by a zone of P+ material which at least partially surrounds the region of N+ material, upon operation of the turn-off device current is derived from the P- well below this N+ region to the P+ well adjacent this N+ region.
Because of the lower resistance of the P+ well the turn-off device is able to interrupt a larger current.
Another characteristic feature of the present device is that said zone completely surrounds said region.
Still another characteristic feature of this device is that it includes a plurality of regions each completely surrounded by said zone.
In these cases a still lower resistance path is formed for the current leaving the P- well and therefore the device is able to interrupt a still larger current.
Another advantage of the present semiconductor device is that it does not require the use of an above mentioned additional pinched trigger resistance.
Yet another characteristic of the present device it that said turn-off device is constituted by a PMOS transistor.
Also another characteristic of the present device is t
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Plummer, J. D. and Scharf, B. W., "Insulated-Gate Planar Thyristors: I-Structure and Basic Operation", IEEE Trans. on Electron Devices, vol. ED-27 (1980), Feb., 380-386.
Remmerie Guido P. T. C.
Van de Pol Daniel F. J.
Van den Bossche Luc J. L.
ALCATEL N.V.
Crane Sara W.
James Andrew J.
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