Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...
Reexamination Certificate
2002-03-28
2003-09-16
Ngô, Ngân V. (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Non-single crystal, or recrystallized, semiconductor...
Field effect device in non-single crystal, or...
C257S350000, C257S435000
Reexamination Certificate
active
06621103
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a lower layer structure for a polycrystalline semiconductor layer, and in particular to a lower layer structure for a polycrystalline silicon active layer of a thin film transistor (hereinafter referred to as a “TFT”) of an active matrix type display.
2. Description of the Related Art
Because the thickness, size, and weight of flat panel displays such as liquid crystal displays (hereinafter referred to as “LCDs” can be reduced and the flat panel displays have low power consumption, LCDs or the like are now widely used as displays for various devices such as, for example, portable information devices. LCDs having a thin film transistor or the like provided as a switching element in each pixel are called “active matrix” displays. Because display content for each pixel can be reliably maintained in such panels, active matrix displays are used for high resolution, high quality display applications.
FIG. 1
shows an equivalent circuit for a pixel in an active matrix type LCD. Each pixel comprises a thin film transistor (TFT) connected to a gate line GL and a data line DL. When the TFT is switched on by a selection signal output through the gate line, data corresponding to the display content is supplied from the data line through the TFT to a liquid crystal capacitor Clc. Also, because the written display data must be reliably maintained for the duration of the time from after the TFT is selected and data is written until the TFT is selected again, a storage capacitor Csc is connected to the TFT in parallel to the liquid crystal capacitor Clc.
In such an active matrix type LCD, a top gate type TFT in which a polycrystalline silicon (polysilicon) layer is used as an active layer and a gate electrode is formed above the active layer is a known type of TFT provided for each pixel. Because a top gate type polysilicon TFT is self-aligned and a source region, a drain region, and a channel region can be easily formed in the polysilicon active layer using its gate, this type of TFT is very advantageous for reducing the size of the TFT and for integration of TFTs.
Moreover, it is known that a polycrystalline silicon layer can be formed by laser annealing through low temperature processes which can polycrystallize an amorphous silicon film after such an a morphous silicon film is formed. The laser annealing can be employed also for forming a high-quality polycrystalline silicon layer on a glass substrate having a low melting point which is inexpensive as a substrate and in which a large area can easily be secured. Accordingly, currently, the laser annealing process is used for manufacturing polysilicon TFTs for active matrix type LCDs.
When such a TFT is used in, for example, a projector panel, in some cases, a metal layer may be formed below the TFT as a light shielding member for preventing light from a light source from entering the active layer of TFT. Moreover, when the TFT is used in a high resolution panel or the like, a metal layer is in some cases formed as a black matrix below the TFT and around the pixel electrode.
Although the laser annealing process as described above allows formation of polycrystalline silicon having superior properties, there is a problem in that the quality of the polycrystalline silicon films resulting from the laser irradiation significantly varies depending on the materials below the silicon layer.
In a top gate type TFT, no structure is required below the channel region of the active layer. Thus, the annealing conditions for the channel formation region of the TFT having a metal layer formed below the channel formation region as described above may differ from those for the channel formation region of the TFT provided on the same substrate but having no metal layer below the channel formation region, because of the thermal conductivity or the like of the metal layer. Therefore, even when identical laser outputs of equal strength are irradiated onto amorphous silicon film, the actual annealing conditions may differ significantly because of the different materials in the layers below the TFT active layer.
FIG. 2A
is a diagram showing the relationship between the energy output of a laser and the grain size of the polycrystalline silicon obtained by the laser annealing process. As shown in
FIG. 2A
, although until a certain point the grain size increases as the supplied energy increases, after the supplied energy exceeds the energy value at which the maximum grain size can be obtained, the grain size rapidly decreases as the supplied energy further increases.
When a metal layer is present below the amorphous silicon film, the heat generated by the laser diffuses very rapidly due to the presence of the metal layer having a relatively high thermal conductivity. In contrast, if the lower layer is a glass substrate, for example, the heat tends to escape more slowly, and, thus, the amorphous silicon film can be heated for a sufficient amount of time. The relationship between the energy supplied by the laser and the grain size which can be obtained respectively for an amorphous silicon film over a glass substrate and for an amorphous silicon film over a metal layer are shown in FIG.
2
B. As is clear from
FIG. 2B
, when the thermal conductivity significantly varies below the active layer and the laser annealing process is to be applied simultaneously, if the laser energy is set so that a large grain size can be obtained at the region where a metal layer is present as a lower layer, for example, the laser at the region where no metal layer is present as a lower layer would be overly irradiated, and, thus, the grain size would be very small.
On the other hand, if the conditions are set to obtain a proper grain size at the region where no metal layer is formed below, the grain size in the polycrystalline silicon film over the region where the metal layer is formed would not be sufficient. Therefore, when thermal conductivities of underlying layers differ significantly, it is very difficult to set the conditions for forming a polycrystalline silicon film having a large grain size in all regions.
SUMMARY OF THE INVENTION
Accordingly, one object of the present invention is to provide a structure for forming a polycrystalline semiconductor film which is used as an active layer of a top gate type TFT or the like, wherein the properties of the film are appropriate in all regions.
In order to achieve at least the object described above, according to the present invention, there is provided a semiconductor device comprising a metal layer formed over a portion of a transparent substrate; a polycrystalline semiconductor film formed above and at least partially overlapping the metal layer and polycrystallized by laser annealing; and a buffer layer provided between the metal layer and the polycrystalline semiconductor layer.
According to another aspect of the present invention, there is further provided a semiconductor device comprising a metal layer formed over a portion of a transparent substrate; a first polycrystalline semiconductor film formed above the metal layer to at least partially overlap the metal layer and a second polycrystalline semiconductor film formed above the region where the metal layer is not formed, the first and second polycrystalline semiconductor films polycrystallized by laser annealing; and a buffer layer provided below the first and second polycrystalline semiconductor film layers and above the metal layer.
According to the present invention, a buffer layer is provided below the semiconductor film which is polycrystallized through laser annealing. In the present invention, it is preferable that the buffer layer has a function to alleviate thermal leakage caused by thermal conduction in the metal layer, through, for example, sufficient thickness and thermal capacity. Thus, even when the material of the layer further below the buffer layer is, for example, a metal layer or a substrate such as glass and there is a significant difference in the thermal leakage for l
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