Semiconductor device and a process for manufacturing the same

Details Semiconductor device and a process for manufacturing the same Semiconductor device and a process for manufacturing the same

1988-06-08

1990-01-02

Wojciechowicz, Edward J.

Fishing, trapping, and vermin destroying

437 34, 437 40, 437 41, 437 44, 437 57, 357 239, 357 42, H01L 21265, H01L 2978

Patent

active

048913260

ABSTRACT:
A process for fabricating a semiconductor device having n-channel and p-channel MOSFET's. Each MOSFET has a pair of side walls that are simultaneously formed on both sides of the gate electrode. The n-channel MOSFET has source and drain regions consisting of a low-concentration region formed by implanting ions using the gate electrode as a mask, and a high-concentration region formed by implanting ions using the gate electrode and side walls as masks. The p-channel MOSFET has source and drain regions consisting of high-concentration regions formed by implanting ions using the gate electrode and side walls as masks.

REFERENCES:
patent: 4366613 (1983-01-01), Ogura et al.
patent: 4519126 (1985-05-01), Hsu
patent: 4530150 (1985-07-01), Shirato
IEEE Transactions on Electron Devices, vol. ED-29, No. 4, Apr. 1982, Tsang et al.

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