Semiconductor device and a method of manufacturing the same

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead

Reexamination Certificate

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C257S698000, C257S781000, C257SE23020

Reexamination Certificate

active

07342302

ABSTRACT:
A semiconductor device includes plural electrode pads arranged in an active region of a semiconductor chip, and wiring layers provided below the plural electrode pads wherein occupation rates of wirings arranged within the regions of the electrode pads are, respectively, made uniform for every wiring layer. To this end, in a region where an occupation rate of wiring is smaller than those in other regions, a dummy wiring is provided. On the contrary, when the occupation rate of wiring is larger than in other regions, slits are formed in the wiring to control the wiring occupation rate. In the respective wirings layers, the shapes, sizes and intervals of wirings below the respective electrode pads are made similar or equal to one another.

REFERENCES:
patent: 6261883 (2001-07-01), Koubuchi et al.
patent: 6291331 (2001-09-01), Wang et al.
patent: 6297563 (2001-10-01), Yamaha
patent: 6440783 (2002-08-01), Wong
patent: 6828681 (2004-12-01), Furuhata
patent: 7102223 (2006-09-01), Kanaoka et al.
patent: 2002/0019082 (2002-02-01), Wang
patent: 2002/0121701 (2002-09-01), Furuhata
patent: 3022565 (2000-01-01), None

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