Fishing – trapping – and vermin destroying
Patent
1991-07-17
1992-11-17
Thomas, Tom
Fishing, trapping, and vermin destroying
437249, 437226, 437 65, 148DIG12, H01L 4900
Patent
active
051642182
ABSTRACT:
A semiconductor device of vertical arrangement includes an anode region formed of a first semiconductor substrate and a second semiconductor substrate joined with the first semiconductor substrate. The first semiconductor substrate forms a high-resistance layer with a predetermined impurity density, and the second semiconductor substrate forms a low-resistance layer whose impurity density is higher than that of the high-resistance layer. A PN junction is formed inside the first semiconductor substrate. The periphery of the first semiconductor substrate including the PN junction is configured in an inverted mesa structure and coated with an insulation material. With this arrangement, the semiconductor device has a high withstand voltage and enables an employment of a large diameter wafer.
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patent: 4968628 (1990-11-01), Delgado et al.
patent: 5089431 (1992-02-01), Slatter et al.
Fujino Seiji
Katada Mitutaka
Tsuruta Kazuhiro
Yamaoka Masami
Nippon Soken Inc.
Thomas Tom
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