Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
2000-06-05
2004-06-29
Nguyen, Cuong (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
C257S750000, C257S781000
Reexamination Certificate
active
06756675
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of Invention
The present invention relates to semiconductor devices and methods for making the same, and particularly, an electrode structure for connecting an external connecting terminal, such as a bonding wire, to an IC chip and a method for making the same.
2. Description of Related Art
A high density arrangement of electrodes (pads) for connecting external connecting terminals, such as a bonding wire, has been required due to the increasing integration density of ICs.
A cross-sectional view of a bonding pad formed using three layers of wiring is exemplified in FIG.
23
.
In a structure as shown in
FIG. 23
, some problems, such as disconnection due to bumps of aluminum wiring and a narrowed bonding region, often arise.
Specifically, when superposing an aluminum pad
8010
as a first layer, an aluminum pad
8110
as a second layer and an aluminum pad
8310
as a third layer, the thickness of each aluminum layer decreases due to a steep slope between different levels, and disconnection due to bumps will readily occur. There is a fair possibility of disconnection due to bumps at a region surrounded with a chain-line circle
8500
in FIG.
23
.
The bonding region decreases with an increased number of electrode layers. As shown in the bottom side of
FIG. 23
, the end of a region capable of bonding in the first pad layer
8010
is represented by P
1
, the end of a region capable of bonding in the second pad layer
8110
is represented by P
2
, the end of a region capable of bonding in the third pad layer
8310
is represented by P
3
, and thus a bonding region decreases as a new layer is superposed. When further superposition of the electrode layers is accelerated, the first electrode layer therefore must have a large area in order to secure the bonding area, and it is difficult to arrange the bonding pad with high density.
SUMMARY OF THE INVENTION
The present invention has been completed in view of the above-mentioned problems, and it is an object of the present invention to provide a semiconductor device and a method for making the same which are capable of high density arrangement of the connecting region for an external connecting terminal, such as a bonding pad, and which are highly reliable.
The present invention which solves the above-mentioned problems has the following construction:
(1) The present invention described in claim 1 is characterized by a semiconductor device having a multiple wiring layer structure, comprising:
a first conductive layer belonging to a first layer and connected to a conductive member for external connection;
a second conductive layer belonging to a second layer below the first layer and provided with a plurality of openings;
a third conductive layer belonging to a third layer below the second layer;
a first insulating interlayer disposed between the first conductive layer and the second conductive layer;
a first through hole provided in the first insulating interlayer;
a fourth conductive layer filled in the first through hole;
a second insulating interlayer disposed between the second conductive layer and the third conductive layer;
a second through hole provided in the second insulating interlayer; and
a fifth conductive layer filled in the second through hole.
According to the claimed invention, the first to third conductive layers form a planar structure having no level differences. Thus, disconnection due to bumps will not occur. The bonding region of each layer always has a constant area in a multiple layer structure. High density bonding pad arrangement therefore can be achieved.
Herein, the term “second layer” means at least one layer of conductive layers (intermediate conductive layers) disposed between the first conductive layer and the third conductive layer.
Herein, “first and second layers” widely include, for example, oxide films, silicon nitride films, impurity containing oxide films, organic containing oxide films, insulating films comprising organic materials, and insulating films formed by superposing 2 or more types of the above-mentioned insulating films.
The second conductive layer is provided with openings, the first insulating interlayer and the second insulating interlayer are connected to each other through the openings, and a contiguous section of the insulating interlayer is, thereby, disposed between the first conductive layer and the second conductive layer. Namely, a contiguous prop comprising an insulating material as a constituent of the insulating film is disposed. Thus, no cracks form in the insulating interlayer, for example, when a load is applied during wire-bonding.
(2) The present invention described in claim 2 depending on claim 1, wherein the first insulating interlayer and the second insulating interlayer are connected to each other through the openings of the second conductive layer, and a contiguous section of the first insulating interlayer with the second insulating interlayer is, thereby, formed between the first conductive layer and the third conductive layer.
The provision of the contiguous section (prop) of a hard insulating interlayer is clarified.
In the present invention, openings are selectively provided in a conductive layer which is disposed in an intermediate section, and a contiguous prop is formed by connecting insulating interlayers through the openings, so that the prop carries a load applied to the uppermost layer. No cracks therefore form in the insulating interlayer. As a result, reliability of the semiconductor device improves.
Insulating interlayers of SiO
2
films and the like are generally harder than conductive layers (metal layers). If no openings are formed in the second conductive layer, the first insulating interlayer and the second insulating interlayer are mutually isolated, and each insulating interlayer is sandwiched between two conductive layers. When a load is impressed during wire-bonding, the soft conductive layers are strained, and the strained conductive layers impress the hard insulating interlayers. Cracks will readily form in the hard insulating interlayers disposed between the conductive layers. In contrast, in the present invention, the insulating interlayers can be protected by the contiguous prop and thus crack formation is prevented.
(3) The present invention described in claim 3 depending on claim 1, wherein the second conductive layer has a planar network pattern.
The intermediate conductive layer (the second conductive layer) disposed between the uppermost conductive layer (the first conductive layer) and the lowest conductive layer (the third conductive layer) is shaped into a mesh. Many openings can be effectively formed while maintaining a high current flow density of the second conductive layer.
(4) The present invention described in claim 4 depending on claim 1, wherein the third conductive layer is the lowest conductive layer formed on an insulating film covering a surface of a semiconductor substrate, and the third conductive layer is also provided with a plurality of openings.
Since openings are provided in the lowest conductive layer disposed below the prop of the external connecting terminal, the mechanical strength is further improved and effects for suppressing crack formation in the insulating interlayer is enhanced.
In the openings of the lowest conductive layer (the third conductive layer), the prop of the insulating film is directly connected to the insulating film which covers the surface of the semiconductor substrate, and a hard contiguous prop is formed without disposition of a conductive layer. Since the hard contiguous prop of an insulating film carries the uppermost electrode connected to the external connecting terminal, the strength against a pressure impressed from the upper side is further improved.
(5) The present invention described in claim 5 depending on claim 4, wherein the third conductive layer has a planar network pattern.
The third conductive layer is shaped into a mesh. Many openings can be effectively formed while maintaining a high current flow density of the third conduct
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