Semiconductor device manufacturing: process – With measuring or testing
Reexamination Certificate
2002-10-23
2003-12-09
Picardat, Kevin M. (Department: 2822)
Semiconductor device manufacturing: process
With measuring or testing
C438S010000, C438S017000
Reexamination Certificate
active
06660541
ABSTRACT:
BACKGROUND OF THE INVENTION
The invention relates to a semiconductor device and a method of manufacturing the semiconductor device, and in particular, to a semiconductor device and a method of manufacturing the semiconductor device to obtain a high degree of reliability and a high yield.
Methods of manufacturing semiconductor devices such as IC and LSI have front process of forming integrated circuits on a surface of a silicon wafer and a testing process of testing the electrical characteristics of each circuit in a predetermined stage to judge whether the circuit is defective or non-defective every chip. Alternatively, the methods have back process including a process of separating the silicon wafer into individual chips or a process of further encapsulating the chips with resin, ceramic or the like as the occasion demands.
The above testing of electrical characteristics can be broadly divided into a probing test for judging good or wrong of conduction between circuits, a burn-in test for acceleratively screening failures by applying thermal and electrical stresses to the circuits, and a final test for finally testing the circuits at high frequencies.
In the above various kinds of testing methods all, basic connecting means between a wafer to be tested or a chip to be tested and an external test system are the same. They use a method of mechanically pressing conductive fine probes individually on electrode pads of aluminum alloy or other alloys, which pads have a square ranging between several tens &mgr;m and one hundred several tens &mgr;m and a thickness of about 1 &mgr;m and are patterned with a pitch ranging between several tens &mgr;m and one hundred several tens &mgr;m on a wafer to be tested. As an example of the above described probe, there is a tungsten probe of which tip has a curvature of about 20 &mgr;m.
Concerning the above described processes in the methods of manufacturing semiconductor devices, JP-A-1-150863 discloses a configuration in which a bridge of which both ends are fixed on a top surface of a substrate is formed, and a probe is formed at the center of the bridge, and conductive wiring is formed from the probe. JP-A-7-7052 discloses a configuration in which a cantilever structure is held by an insulating substrate having conductive wiring patterns formed thereon and is used as a probe for measuring electrical characteristics.
In the methods of testing semiconductor devices as described above with reference to the prior art, there are the following problems.
In all the known methods described above, a plurality of bridges or cantilever structures are individually bonded to a substrate, and therefore much time and effort are required for positioning and fixing probes with high accuracy. Further, for the known methods, it is difficult to cope with the demands for narrower pitches and also it is not easy to improve manufacturing yield. Also, it is considered that it is difficult for the bonding method to reduce variations in the height of the probes when a plurality of probes are formed.
Also, with increasing integration of semiconductor elements, narrow-pitch testing technology and low-load testing technology reducing damage applied to thin film electrode pads of semiconductor elements are more desired.
The invention is intended to resolve the above described problems. An object of the invention is, in the testing of electrical characteristics of semiconductor devices, to provide a semiconductor device and a method of manufacturing the semiconductor device allowing efficient manufacturing of the semiconductor device, wherein the method has, for example, an efficient testing process reliably bringing the probes into contact with the electrode pads formed with a narrow pitch on semiconductor element to be tested.
SUMMARY OF THE INVENTION
A method of manufacturing a semiconductor device according to a first aspect of the invention has a forming process of forming a semiconductor element comprising electrode pads on a semiconductor wafer and testing process of testing the electrical performance of the formed semiconductor element, the testing process including connecting process of electrically connecting a testing apparatus to the electrode pads formed on the semiconductor element to be tested, the connecting process electrically connecting the testing apparatus to the electrode pads, the testing apparatus having a probe-formed substrate comprising a plurality of beams having probes to be electrically connected to the electrode pads, and the probe-formed substrate having a first beam having at least one probe for electrically connection with the electrode pad and a second beam having a number of probes for electrical connection with the electrode pads of which number is more than the number of the electrode pads electrically connected by the first beam.
Preferably, the beam structure can be formed such that the pressing force applied to each probe may be made constant according to a different number of probes formed on the first beam, and it can be easily cope with electrode pads with a narrow pitch while suppressing the difference between the pressing forces, and wiring is connected from the probes to secondary electrode pads via an insulating layer.
By the way, the manufacturing method of the invention is adaptable to a semiconductor device in which a pitch between adjacent electrode pads is as narrow as equal to or less than 80 &mgr;m.
Also, in the above described method of manufacturing a semiconductor device, the second beam may have a beam cross section larger than that of the first beam.
Also, in the above described method of manufacturing a semiconductor device, the second beam may have a beam length shorter than that of the first beam.
Also, in the above described method of manufacturing a semiconductor device, the second beam may have a beam width or beam thickness larger than that of the first beam.
A method of manufacturing a semiconductor device according to a second aspect of the invention has forming process of forming a semiconductor element comprising electrode pads on a semiconductor wafer and testing process of testing the electrical performance of the formed semiconductor element, the testing process including connecting process of electrically connecting a testing apparatus to the electrode pads formed on the semiconductor element to be tested, the connecting process electrically connecting the testing apparatus to the electrode pads, the testing apparatus having a probe-formed substrate comprising a beam having a probe to be electrically connected to the electrode pad and a plurality of secondary electrodes connected to the probe through wiring, and the probe-formed substrate having a first wiring for connection with a first probe and having a first wiring width and a second wiring for connection with a second probe and having a second wiring width larger than the first wiring width.
By the way, the comparing of the wiring width may be done in volume or projected area of the wiring.
Also, in the above described method of manufacturing a semiconductor device, the second wiring may have a wiring width equal to or more than twice as wide as that of the first wiring.
Also, in the above described method of manufacturing a semiconductor device, the second wiring may have a wiring width equal to or more than 10 times as wide as that of the first wiring.
Also, in the above described method of manufacturing a semiconductor device, the first wiring may be a signal line and the second wiring may be a power supply line or a ground line.
A method of manufacturing a semiconductor device according to a third aspect of the invention has forming process of forming a semiconductor element on a semiconductor wafer and testing process of testing the electrical performance of the formed semiconductor element, the testing process including connecting process of electrically connecting a testing apparatus to an electrode pad formed on the semiconductor element to be tested, the connecting process electrically connecting the testing apparatus to the electrode
Aoki Hideyuki
Aono Takanori
Endo Yoshishige
Kanamaru Masatoshi
Kohno Ryuji
Hitachi , Ltd.
Picardat Kevin M.
Townsend and Townsend / and Crew LLP
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