Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support
Reexamination Certificate
2000-12-12
2002-06-04
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Metallic housing or support
C438S106000
Reexamination Certificate
active
06399423
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a semiconductor manufacturing technique and, more particularly, to a technique which is effective when applied to an improvement in the connection reliability at the time of mounting a surface mount type semiconductor device.
DESCRIPTION OF THE RELATED ART
The technique to be explained has been examined by us when we investigated and completed the invention, as will be summarized in the following.
One resin-sealed type semiconductor device, as intended to reduce the size, is exemplified by a semiconductor package called the “QFN” (Quad Flat Nonleaded Package).
The QFN is a surface mount in which a plurality of thin leads arranged around a tub supporting a semiconductor chip are arranged on the back face (i.e., the face on the semiconductor device mounting side) of a sealing body, and has a single-face molding structure which uses a lead frame having only one resin-molded face.
In the QFN, the individual leads are arranged on the back face of the sealing body so that a packaging area (of the connecting region) has been retained for mounting the leads with a solder on the mount substrate.
Therefore, the QFN is molded with a film sheet so that burrs (such as resin burr of a leakage resin or resin flush, as will be called the “resin burr”) of a molding resin may not be formed on the leads on the back face of the sealing body (although this molding method will be called the “laminate molding method”).
At the molding time, more specifically, the film sheet is held in close contact with the back face of the sealing body in the cavity of the molding die, so that the resin burr may be prevented from sticking to the leads on the back face of the sealing body.
Here, the structure of the QFN is described, for example, on pages 56 and 57 of “Semiconductor Assembling/Testing Technique of '99, Extra Issue of 1998 of Monthly Semiconductor World 1998”, issued on Jul. 27, 1998 by Kabushiki Gaisha PRESS JOURNAL”.
SUMMARY OF THE INVENTION
In the QFN of the technique thus far described, however, the stand-off height at the packaging time is made substantially as small as the plated thickness by its structure. Therefore, the solder wettability at the QFN packaging time is seriously deteriorated if the resin burr is formed in the vicinity of the leads on the back face of the sealing body.
In the QFN, moreover, leads
1
a
may be deformed toward the side of a semiconductor chip
2
, as exemplified in the comparison of
FIG. 19A
, by the influence such as the resin charging pressure at the molding time. As in a QFN
25
of the comparison of
19
B, a resin burr
16
such as the resin flash is then easily formed on the lower side (or back side) of the deformed lead
1
a.
This resin burr
16
raises a problem that it can hardly be removed by the well-known deburring method such as the high-pressure water method or the liquid honing method.
In the semiconductor package having the single-face molding structure such as the QFN, on the other hand, the laminate molding method may be performed. Even with this laminate molding method, however, it is difficult to eliminate the resin burr completely. Another problem is that it takes a cost to make a modification into the laminate molding apparatus.
Where the QFN is molded by the laminate molding method, moreover, the molding resin charged between the leads may be wrinkled to form protrusions of the film sheet. These protrusions obstruct the lead clamping in the cutting die at the lead cutting time thereby to cause a problem that the leads are cut to become defective.
Here at the lead cutting step, the leads are pressed and cut downward (in the direction of the face on the side opposed to the mounted face) by the cutting punch (or cutting blade). Then, the lead burr is formed on the lower side (or on the mounted side) of the leads to cause the defective connection at the QFN packaging time thereby to raise a problem that the connection reliability is lowered.
On the other hand, the QFN is troubled by another problem that the materials of the individual components are deformed by the heat at the working time so that they cannot retain their flatnesses.
In the manufacture of the QFN, there is another problem that the facial pressure on the molding die has to be strictly managed so as to prevent the back face of the sealing body from having the resin burr.
At this time, another problem is that the molding die has to be frequently cleaned.
On the other hand, the technique for exposing the leads to the back face of the semiconductor device by polishing the back side is described in Japanese Patent Laid-Open No. 195743/99 and 240940/90. However, the former has no description on the semiconductor device having the single-face molding structure. The latter is directed to the technique for separating an integral lead into individual leads by polishing the back face side of the semiconductor device, but does not have any description on the semiconductor device in the state where the inner portions of the adjoining leads are separated in advance.
An object of the invention is to provide a semiconductor device for improving the connection reliability at a packaging time, and a method of manufacturing the same.
Another object of the invention is to provide a semiconductor device intended to facilitate the process management, and a method of manufacturing the same.
The aforementioned and other objects and novel features of the invention will become apparent from the following description to be made with reference to the accompanying drawings.
The representative of the invention disclosed herein will be briefly described in the following.
According to an aspect of the invention, there is provided a resin-sealed type semiconductor device comprising: a tub for supporting a semiconductor chip; a sealing body formed by sealing the semiconductor chip with a resin; a plurality of leads arranged around the tub and exposed to the face of the sealing body on the semiconductor device mounting side; and connecting members for connecting the surface electrodes of the semiconductor chip and the corresponding ones of the leads. The two widthwise edge portions of each of the leads are formed of rounded faces, and the mounted face of the lead including the rounded faces is protruded at its central portion from the face of the sealing body on the semiconductor device mounting side.
According to another aspect of the invention, there is provided a method of manufacturing a resin-sealed type semiconductor device, comprising the steps of: preparing a lead frame in which a plurality of leads are arranged around a tub for supporting a semiconductor chip; bonding the tub and the semiconductor chip; connecting the surface electrodes of the semiconductor chip and the corresponding ones of the leads by connecting members; forming a sealing body by resin-sealing the semiconductor chip and the connecting members on the lead frame on the semiconductor chip arranging side, to arrange the plurality of leads on the face of the semiconductor device mounting side; exposing the plurality of leads by polishing the face of the sealing body on the semiconductor device mounting side; and separating the plurality of leads from the frame portion of the lead frame.
According to the invention, the connection regions of the leads needed at the time of mounting the semiconductor device on the mount substrate can be reliably exposed to improve the connection reliability at the time of packaging the semiconductor device.
According to still another aspect of the invention, there is provided a method of manufacturing a resin-sealed type semiconductor device, comprising the steps of: preparing a lead frame in which a plurality of leads are arranged around a tub for supporting a semiconductor chip; bonding the tub and the semiconductor chip; connecting the surface electrodes of the semiconductor chip and the corresponding ones of the leads by connecting members; forming a sealing body by resin-sealing the semiconductor chip and the connecting members on the lead fram
Kobayashi Shouichi
Matsuura Takao
Tsuchiya Kouji
Yamaguchi Yoshihiko
Hitachi Ltd
Mattingly Stanger & Malur, P.C.
Nelms David
Nhu David
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