Semiconductor device adapted for power shutdown and power...

Details Semiconductor device adapted for power shutdown and power... Semiconductor device adapted for power shutdown and power...

2005-08-02

2005-08-02

Elms, Richard (Department: 2824)

Static information storage and retrieval

Powering

Data preservation

C365S227000, C716S030000, C257SE23153

Reexamination Certificate

active

06925026

ABSTRACT:
A semiconductor device that achieves high speed and low power consumption that can be used in a real-time system by preventing held data from disappearing at the time of power shutdown and sharply rising power while also preventing a through-current at the time of power resumption. During normal operation, the switch is on, and the clock generating circuit and the data holding circuit are operated with the first power supply voltage. When data holding is required at the time of power shutdown, the switch and the first power supply voltage supplied to the logic circuit are turned off, and the clock generating circuit and the data holding circuit are operated with the second power supply voltage.

REFERENCES:
patent: 4654829 (1987-03-01), Jiang et al.
patent: 5515232 (1996-05-01), Fukazawa et al.
patent: 5650974 (1997-07-01), Yoshimura
patent: 5783964 (1998-07-01), Eitan
patent: 5801457 (1998-09-01), Hong et al.
patent: 6256252 (2001-07-01), Arimoto
patent: 6308307 (2001-10-01), Cano et al.
patent: 6493257 (2002-12-01), Coughlin et al.

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