Semiconductor device, active matrix substrate and process...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum

Reexamination Certificate

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C257S249000, C257S291000, C257S292000, C257S293000, C257S462000, C257S752000, C257S758000, C257S760000, C257S765000, C257S771000, C257S775000

Reexamination Certificate

active

06307264

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and an active matrix substrate which is improved in the electrode or wiring thereof. The present invention also relates to a process for producing the semiconductor device or the active matrix substrate.
2. Related Background Art
Semiconductor devices usually have wiring for connecting the semiconductor substrate or the semiconductor layer with an external circuit. The wiring is generally made by Al (aluminum). An example of the process for Al wiring or Al electrode formation is Damascene Process employing CMP (chemical mechanical polishing) reported in '94 VLSI Symp. This process is explained below by reference to
FIGS. 14A
to
14
D. In
FIGS. 14A
to
14
D, a thermal oxidation film
61
, and an insulating interlayer film
62
are formed on a silicon substrate
60
(FIG.
14
A). The insulating interlayer film
62
is patterned to form an Al-embedding pattern
63
(FIG.
14
B). Thereon, an Al film
64
is formed by sputtering (
FIG. 14C
) in a thickness larger than the height of the Al-embedding pattern. Then the Al film
64
is polished by a CMP method to form an Al electrode
65
(FIG.
14
D).
In the wiring or electrode formation by the Damascene process described above, the Al electrode
65
is concaved and becomes thinner in the middle portion of disadvantageously as shown in FIG.
15
E. This thinning is called dishing. This dishing is caused by non-uniform polishing owing to difference of CMP polishing rates between the material of the metal layer such as Al and the material of the insulating layer such as p-SiO coexisting in one and the same polishing plane, and deformability of the polishing cloth. The material of a higher polishing rate is polished more. The polishing rate of Al is four or five times as high as that of p-SiO, resulting in dishing of the Al electrode
65
. The degree of dishing increases with increase of the size of the Al electrode as shown in
FIG. 16
, and at the size of 300 &mgr;m of the Al electrode the dishing can reach about 3000 Å. When the Al electrode is in a size of several hundred &mgr;m like the portion of a wire bonding pad, the Al electrode
65
can be partly removed by excessive dishing to render the wire bonding impracticable and to lower productivity of elements. Further, in Al wiring, the dishing increases the resistance of the wiring to deteriorate the properties of the devices.
SUMMARY OF THE INVENTION
The object of the present invention is to provide a process for producing a semiconductor device and an active matrix substrate with a reduced degree of dishing of the electrode or wiring.
The process for producing a semiconductor device of the present invention comprises a step of polishing of a region of an electroconductive material serving as an electrode or a wiring line in an insulating layer formed on a semiconductor region, the region of the electroconductive material being electrically connected to the semiconductor region, wherein a region of another material is formed within the region of the electroconductive material to be polished.
The process for producing an active matrix substrate of the present invention comprises a step of polishing picture element electrodes made of a metal provided on crossing portions of plural signal lines and plural scanning lines and a means for applying voltage to the picture elements, wherein a region of another material is formed within the region of the picture element electrode to be polished.
The above mentioned technical problems are solved and the above object can be achieved by the present invention having the constitution above.
The present invention relates also to a semiconductor device and an active matrix substrate.
The semiconductor device of the present invention has a region of an electroconductive material serving as an electrode or a wiring line in a insulating layer formed on a semiconductor region, the region of the electroconductive material being electrically connected to the semiconductor region, wherein a region of another material is formed within the regions of the electroconductive material.
The active matrix substrate of the present invention has picture element electrodes made of a metal provided on intersecting points of plural signal lines and plural scanning lines, and a means for applying voltage to the picture elements, wherein a region of another material is formed within the region of the picture element electrode.
The electroconductive material or the picture element electrode material of the present invention is preferably aluminum. The region of another material is preferably made from SiO or SiN.
The semiconductor device of the present invention includes ordinary ICs, and liquid crystal display device having a displaying section and a driving section in integration. The active matrix substrate of the present invention includes those used for liquid crystal display apparatuses, and those used for display devices in which the picture element electrode such as DMD (digital micromirror device) is moved.
The process of the present invention produces a semiconductor device or an active matrix substrate with a reduced degree of dishing of the electrode or wiring according to the present invention. Thereby, the variation of wiring resistance is sufficiently reduced, and the resulting semiconductor device has excellent properties. Further, the formed electrode is sufficiently flat, and the resulting active matrix substrate of the present invention is improved in brightness and contrast of the displayed image. The semiconductor device and the active matrix substrate of the present invention has sufficiently low wiring resistance and has electrodes in a nearly planar face, giving an image display with improved brightness.


REFERENCES:
patent: 5426523 (1995-06-01), Shimada et al.
patent: 5596230 (1997-01-01), Hong
patent: 5602423 (1997-02-01), Jain
patent: 0363100 (1990-04-01), None
patent: 0710981 (1996-05-01), None
patent: 0751417 (1997-01-01), None
patent: 5-28925 (1990-01-01), None
patent: 5-251412 (1993-09-01), None
patent: WO 27321 (1994-11-01), None
IBM Tech. Discl. Bull., vol. 33, No. 4 (Sep. 1, 1990) pp. 223-24.

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