Semiconductor device

Details Semiconductor device Semiconductor device

2000-04-25

2002-04-30

Ngô, Ngân V. (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Responsive to non-electrical signal

Electromagnetic or particle radiation

C257S461000, C257S577000

Reexamination Certificate

active

06380602

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device, and particularly to a semiconductor device having a photoreceptor element and another circuit element on a common semiconductor base substrate, and a fabrication method thereof.
A photodiode representative of a photoreceptor element is widely used as an optical sensor for converting an optical signal into an electric signal, concretely, as an optical sensor for control in various kinds of photoelectric conversion equipment. Along with a requirement toward higher function and miniaturization, such a photodiode becomes widely available as a circuit-integrated photoreceptor element or an IC having a photoreceptor element, that is, a photodiode IC in which the photodiode is integrated with a peripheral signal processing circuit element such as a transistor, a resistor, or a capacitance.
FIG. 7
is a schematic sectional view of a related art semiconductor of this type. Referring to
FIG. 7
, a p-type semiconductor layer
102
having a low concentration P
−−
and an n-type semiconductor layer
103
are sequentially stacked on a p-type semiconductor substrate
101
, to form a so-called PIN photodiode PD as a photoreceptor element, and a functional circuit for processing an optical current from the PIN photodiode is formed on the low concentration p-type semiconductor layer
102
. In the figure, an npn-type bipolar transistor Bi-Tr as a circuit element constituting part of the functional circuit is shown.
Element isolation regions
104
for isolating elements from each other are formed in the low concentration n-type semiconductor layer
103
by ion implantation from the surface of the low concentration p-type semiconductor layer
103
, followed by thermal diffusion treatment.
The photodiode IC in which the PIN photodiode PD and the functional circuit for processing an optical current from the PIN photodiode PD are assembled in the same semiconductor base substrate
100
, however, has the following problems. Since each element isolation region
104
is formed by ion implantation and diffusion from the surface side as described above, the impurity concentration becomes lower on the bottom side of the element isolation region
104
. As a result, the amplification ratio of npn-type parasitic transistors formed with the p-type element isolation region
104
put therebetween becomes larger, so that the effect of the parasitic transistors becomes large. Also, when a voltage is applied to an n-type region of the n-type semiconductor layer
103
, a depletion layer due to the pn-junction between the n-type semiconductor layer
103
and the p-type low concentration semiconductor layer
102
extends under the element isolation region
104
, to cause the punchthrough, thereby obstructing the isolation function. Further, in the case where one electrode of the photodiode PD is extracted from the isolation region
104
, the parasitic resistance becomes large, to cause an inconvenience in degrading the frequency characteristic, thereby varying a current flowing in the functional circuit configured by the combination of functional elements including such a transistor and inducing oscillation, malfunction, and variations in output of these elements and circuits.
To solve such problems, there has been adopted a structure in which a p-type element isolation region is formed between a photodiode and another element in such a manner as to extend from the surface of an n-type semiconductor layer to a low concentration p-type semiconductor layer in order to isolate the n-type semiconductor layer; the concentration of the p-type element isolation region is made relatively higher; the depth of the p-type element isolation region is set to somewhat extend in the low concentration p-type semiconductor layer; and the width and the impurity concentration of the element isolation region are made relatively large. With this configuration, it is possible to suppress the above-described action of the parasitic components between the elements including the photodiode PD and the functional circuit.
For example, Japanese Patent Laid-open No. Hei 1-205564 discloses a structure shown by a schematic sectional view of FIG.
8
. The structure is intended to increase a resistance against the action of the parasitic components between respective elements by forming an element isolation region
104
s
connected to each element isolation
104
in the low concentration semiconductor layer
102
, that is, forming the element isolation regions in two stages.
In
FIG. 8
, parts corresponding to those shown in
FIG. 7
are designated by the same characters and the overlapped explanation thereof is omitted.
In
FIGS. 7 and 8
, reference numeral
105
designates an n-type high impurity concentration region formed on the surface of the n-type semiconductor layer
103
of the photodiode PD;
106
is a high concentration n-type collector buried region of a transistor Bi-Tr;
107
is a collector region;
108
is a p-type base region; and
109
is an n-type emitter region.
An insulating layer
110
is formed on the surface of the semiconductor base substrate
100
, and contact windows are formed over the element isolation region
104
, the high concentration region
105
of the photodiode PD, the base region
108
of the bipolar transistor Bi-Tr, and the emitter region
109
. Electrodes
111
,
112
and
113
are brought into ohmic-contact with the element isolation region
104
, the high concentration region
105
of the photodiode PD, the base region
108
of the bipolar transistor Bi-Tr, and the emitter region
109
through the contact windows, respectively.
Even in the above configuration, at the functional circuit portion, since the resistance of the substrate is increased, a certain potential occurs at a position apart from the ground extraction (grounding) electrode portion on the substrate
101
side by a certain distance, which may induce a problem such as latchup.
Further, in the case of isolating the elements from each other by provision of the element isolation layers in two stages, it is required to provide a sufficient alignment tolerance between the isolation layers. In other words, it is required to give a certain width for the element isolation layers. This gives a limitation to design rule of the circuit, and changes the area of the circuit itself.
Additionally, since the element isolation regions are disposed in the vicinities of the elements, in the case of forming the high concentration element isolation region by ion implantation, crystal defects caused by implantation of ions at a high concentration may exert adverse effect on the element characteristics.
SUMMARY OF THE INVENTION
An object of the present invention is to solve the above-described problems, and to provide a semiconductor device, particularly, an IC having a photoreceptor element capable of preventing mutual interference between functional circuits and a malfunction due to latchup.
According to the present invention, there is provided a semiconductor device in which a photoreceptor element and at least one semiconductor element other than the photoreceptor element are formed on a common semiconductor base substrate, characterized in that the semiconductor base substrate has a low impurity concentration semiconductor layer of a first conductive type; a high impurity concentration region of the first conductive type having an impurity concentration higher than that of the low impurity concentration semiconductor layer is formed in the low impurity concentration semiconductor layer at a forming portion of the semiconductor element; and the photoreceptor element comprises a low impurity concentration region, other than the high impurity concentration region at the forming portion of the semiconductor element, of the low impurity concentration semiconductor layer, and a second conductive type region formed on the low impurity concentration region.
According to the present invention, there is also provided a method of fabricating a semiconductor device in which a p

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