Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Field effect transistor
Reexamination Certificate
2000-09-20
2002-01-15
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Heterojunction device
Field effect transistor
C257S347000, C257S190000, C438S047000
Reexamination Certificate
active
06339232
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a semiconductor device, and particularly to a semiconductor device including a complementary Metal-Oxide-Semiconductor field effect transistor (CMOSFET).
BACKGROUND OF THE INVENTION
In recent years, the size of a CMOSFET has been miniaturized, and it is expected that the advancement is further made beyond the 0.1 &mgr;m generation. After this, it is considered that as the size is miniaturized more, various problems as indicated in the SIA (Semiconductor Industry Association) Roadmap occur.
As the size of the CMOSFET is miniaturized more, problems occur, one of which relates to a gate electrode. Conventionally, although polycrystalline silicon is used for the gate electrode, it is difficult to dope polycrystalline silicon with an impurity at a high concentration. Thus, there is a problem that a gate capacitance is lowered by depletion in polycrystalline silicon makes current driving power increase and interferes with suppression of a short channel effect.
In order to solve this problem, a CMOSFET using metal/oxide/semiconductor field effect transistor (MOSFET), in which metal is used as a material of a gate electrode, has been studied. However, in order to realize a CMOSFET of the sub-0.1 micron generation by using a metal gate, the following problem still remains.
In general, in a CMOSFET having a gate electrode made of metal, in order to simplify a manufacturing process, the same metal is used for the gate electrodes of an n-channel MOSFET and a p-channel MOSFET. In such a CMOSFET, in the case where an impurity concentration in a substrate is set so that the short channel effect is sufficiently suppressed, normally, in both of them, a threshold voltage becomes as high as 0.5 V or higher. Since a power voltage of 1 V or less is expected in the CMOSFET of the sub-0.1 micron generation, such a high threshold voltage causes a drop in current driving power of the MOSFET, and further, a drop in operation speed of a circuit.
SUMMARY OF THE INVENTION
The present invention has been made in view of the above problem, and has an object to provide a semiconductor device in which gate electrodes of both an n-channel MOSFET and a p-channel MOSFET constituting a CHOSFET are made of the same material, and a threshold voltage of each of them is sufficiently decreased.
Another object of the present invention is to provide a semiconductor device that includes an n-channel MOSFET and a p-channel MOSFET constituting a CMOSFET and can be manufactured by a simplified process.
According to a first aspect of the present invention, a semiconductor device comprises a semiconductor substrate, and an n-channel field effect transistor and a p-channel field effect transistor respectively formed on the semiconductor substrate, the n-channel field effect transistor and the p-channel field effect transistor constitute a complementary field effect transistor, and the semiconductor device is characterized in that
a gate electrode of the n-channel field effect transistor and a gate electrode of the p-channel field effect transistor are made of the same material,
a channel region of the n-channel field effect transistor is made of at least of Si and in which an energy difference between a conduction band edge and a vacuum level is higher than that of bulk Si, and a channel region of the p-channel field effect transistor is made of at least of Si and in which an energy difference between a valence band edge and the vacuum level is lower than that of bulk Si,
a work function of the material making the gate electrodes is higher than the energy difference between the conduction band edge of the material making the channel region of the n-channel field effect transistor and the vacuum level, and is lower than the energy difference between the valence band edge of the material making the channel region of the p-channel field effect transistor and the vacuum level.
At this time, it is preferable to introduce tensile stress into the material making the channel region of the n-channel field effect transistor.
It is preferable to introduce compressive stress into the material making the channel region of the p-channel field effect transistor.
It is preferable that the material making the channel region of the n-channel field effect transistor is Si into which tensile stress is introduced. It is so-called strained Si in this specification.
It is preferable that the material making the channel region of the p-channel field effect transistor is SiGe.
It is preferable that the Fermi level EF of the gate electrode material is (
4
E
v2
+E
c1
)/5 or less and (E
v2
+
4
E
c1
)/5 or less, E
v2
is the valence band edge of the material making the channel region of the p-channel field effect transistor and E
v1
is the conduction band edge of the material making of the channel region of the n-channel field effect transistor.
It is preferable that the Fermi level E
F
of the gate electrode material is substantially (E
v2
+E
c1
)/2, E
v2
is the valence band edge of the material making the channel region of the p-channel field effect transistor and E
c1
is the conduction band edge of the material making of the channel region of the n-channel field effect transistor.
It is preferable that E
c1
of the channel material of the n-channel MOSFET is higher than (E
v0
+E
c0
)/ 10 and not higher than (E
v0
+E
c0
)/2, E
v0
is the valence band edge of the bulk Si and E
c0
is the conduction band edge of the bulk Si.
It is preferable that E
v2
of the channel material of the p-channel MOSFET is not less than (E
v0
+E
c0
)/2 and less than (
9
E
v0
+E
c0
)/10, Evo is the valence band edge of the bulk Si and E
c0
is the conduction band edge of the bulk Si.
According to a second aspect of the present invention, a semiconductor device comprises a semiconductor substrate;
an n-channel field effect transistor formed on the semiconductor substrate; and a p-channel field effect transistor formed on the semiconductor substrate, the n-channel field effect transistor and the p-channel field effect transistor constituting a complementary field effect transistor, wherein a gate electrode of the n-channel field effect transistor and a gate electrode of the p-channel field effect transistor are made of a same material, wherein at least a part of a channel region of the n-channel field effect transistor is formed in a strained Si layer, wherein at least a part of a channel region of the p-channel field effect transistor is formed in a first SiGe layer, and wherein a work function of the material making the gate electrodes is higher than an energy difference between a conduction band edge of the strained Si layered and a vacuum level, and is lower than an energy difference between a valence band edge of the first SiGe layer and the vacuum level.
It is preferable that the n-channel field effect transistor includes a second SiGe layer, which has the same composition ratio as the first SiGe layer and is disposed between the semiconductor substrate and the strained Si layer, and a tensile stress is introduced into the strained Si layer from the second SiGe layer.
It is preferable that the n-channel field effect transistor includes a second SiGe layer which has a Ge concentration higher than the first SiGe layer and is disposed between the semiconductor substrate and the strained Si layer, the p-channel field effect transistor includes a third SiGe layer which has the same composition ratio as the second SiGe layer and is disposed between the semiconductor substrate and the first SiGe layer, a tensile stress is introduced into the strained Si layer from the second SiGe layer, and compressive stress is introduced into the first SiGe layer from the third SiGe layer.
It is preferable that the p-channel field effect transistor includes a Si layer between the first SiGe layer the third SiGe layer.
It is preferable that the first SiGe layer composes Si
1−x
Ge
x
and the second SiGe layer composes Si
1−y
Ge
y
(y>x).
According to the first or second aspect of th
Huynh Andy
Kabushika Kaisha Toshiba
Nelms David
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