Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With housing mount
Reexamination Certificate
2000-03-06
2002-07-30
Smith, Matthew (Department: 2825)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With housing mount
C257S772000, C257S787000, C257S666000, C257S678000, C257S696000
Reexamination Certificate
active
06426554
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an integrated circuit (IC) semiconductor device, and more particularly to a semiconductor device suitable for use as a so-called chip size package.
2. Description of the Related Art
A chip size package (hereafter referred to as a CSP) is an example of IC semiconductor device packages. In this CSP, in order to facilitate handling of a semiconductor chip, a semiconductor chip having a mounting surface, on which connecting pads are mounted, is often combined as one body with a mounting board called an interposer made of a synthetic resin material, such as a glass epoxy or a polyimide, or a ceramic.
On the upper surface of the mounting board, there are provided connecting terminals to be connected to the connecting pads on the chip, and the corresponding terminals are connected through bumps to the connecting pads on the chip. On the lower surface of the mounting board, mounting terminals are provided to correspond to the connecting terminals connected through the bumps to the chip.
The space between the upper surface of the mounting board and the mounting surface of the semiconductor chip is filled with a resin material called an underfill for reinforcement and dust-proofing and water-proofing. As the mounting terminals on the mounting board are connected through solder balls to the circuit on a printed circuit board, the CSP is fixed to the printed circuit board by the mounting terminals. Thus, the CSP is mounted on the printed circuit board.
As the space for the connecting pads mounted on the mounting surface of the semiconductor chip decreases as the down-sizing of the semiconductor chip progresses, the above-mentioned bumps that lie between the semiconductor chip and the mounting board decrease in size. As the bumps decrease in size, the space between the semiconductor chip and the mounting board filled with an underfill decreases, so that secure filling of the underfill becomes difficult.
An object of the present invention is to provide a semiconductor device suitable for down-sizing of the semiconductor chip and also suitable for use as a CSP.
An additional object of the present invention is to provide semicoductor packaging with a simpler in structure.
SUMMARY OF THE INVENTION
The present invention adopts a following structure to achieve the above objects.
According to the present invention, there is provided a semiconductor device comprising a semiconductor. chip having a mounting surface with connecting pads mounted thereon; and a film having a gluing surface facing said mounting surface and a mounting surface to a circuit board on a surface opposite said gluing surface, said latter mounting surface having connecting pads mounted thereon, wherein said film has on said mounting surface of said film a wiring pattern with connecting terminals to said connecting pads on said circuit board, wherein said film is an anisotropically conductive film to exhibit conductivity at areas when subjected to a pressure between said wiring pattern and said connecting pads of said semiconductor chip, and wherein said gluing surface of said film is attached solidly to said semiconductor chip with said film kept to exhibit the conductivity by a hardening process of the film.
According to the present invention, the semiconductor chip is formed as a combined body with the conductive film attached solidly to the mounting surface of the semiconductor chip. Thus, the newly configured semiconductor chip has been reinforced by the conductive film and obviates the need for an interposer as in the prior art and is easy to handle.
When the semiconductor device is mounted, the connecting terminals of the wiring pattern on the mounting surface of the conductive film are connected through solder balls as in the prior art to a desired circuit board. In this manner, the semiconductor device is mounted on the circuit board. The mounting surface of the semiconductor chip is covered with the conductive film and is protected thereby. It is unnecessary to perform filling with a resin material as in the prior art.
The above-mentioned semiconductor device may be applied to types of packages other than the CSP, but the most suitable application is in a CSP.
The mounting surface of the film except for the connecting terminals of the wiring pattern may be covered with an insulating film.
This insulating film serves to improve the waterproofing performance of the package.
The connecting terminals of the wiring pattern as connection ends to the connecting pads on the circuit board may be formed as convex portions extending towards the circuit board. The connecting terminals formed as convex portions ensure secure connection when the connecting terminals are attached solidly to the corresponding connecting pads on the circuit board through the intermediary of solder.
The parts of the wiring pattern which correspond to the connecting pads on the semiconductor chip through the intermediary of the above-mentioned film may be provided with raised portions so as to be closer to the semiconductor chip to apply a pressure to the above-mentioned intervening film.
The wiring pattern formed on the above-mentioned film may be formed by transferring the wiring pattern of a conductive layer from a separable support film to the mounting surface of the anisotropically conductive film.
As an alternative to the method just mentioned, the wiring pattern may be formed by patterning the conductive layer formed on the mounting surface of the above-mentioned film.
The anisotropically conductive film may be obtained by preparing conductive particles formed by plating fine particles of a synthetic resin material, for example, with a metal such as gold, or preparing conductive particles of silver, nickel or gold, and dispersing the conductive particles in an epoxy thermosetting or thermoplastic synthetic resin material, for example.
REFERENCES:
patent: 5918113 (1999-06-01), Higashi et al.
patent: 5920118 (1999-07-01), Kong
patent: 5999413 (1999-12-01), Ohuchi et al.
patent: 6096577 (2000-08-01), Hashimoto
patent: 6130483 (2000-10-01), Shizuki et al.
patent: 6163069 (2000-12-01), Oohira et al.
patent: 6204564 (2001-03-01), Miyata et al.
patent: 6262480 (2001-07-01), Ferri et al.
patent: 6268652 (2001-07-01), Kimura
patent: 6271581 (2001-08-01), Huang et al.
patent: 6281567 (2001-08-01), Murayama et al.
patent: 6281568 (2001-08-01), Glenn et al.
patent: 6288851 (2001-09-01), Tomita
patent: 6300161 (2001-10-01), Goetz et al.
patent: 0454150 (1991-10-01), None
patent: 406053347 (1994-02-01), None
patent: 6-203642 (1994-07-01), None
patent: 406188325 (1994-07-01), None
patent: 406196580 (1994-07-01), None
patent: 406204355 (1994-07-01), None
patent: 10-56099 (1998-02-01), None
patent: 10-107072 (1998-04-01), None
Luu Chuong Anh
Oki Electric Industry Co. Ltd.
Smith Matthew
Volentine & Francos, PLLC
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