Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2011-06-07
2011-06-07
Nguyen, Tan T. (Department: 2827)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185050, C365S185210
Reexamination Certificate
active
07957195
ABSTRACT:
The semiconductor device includes a nonvolatile memory, having a memory array containing 1-bit twin cells, each composed of electrically rewritable first and second storage devices, the first and second storage devices holding binary data according to difference of their threshold voltages, and having different retention characteristics depending on difference of the binary data thereof; a read circuit for differentially amplifying complementary data output from the first and second storage devices of the twin cell selected for read, and judging information stored in the twin cell; and a control circuit. Two memory cells constituting a twin cell are arranged to hold different data. Therefore, even when the retention performance of one memory cell deteriorates, the difference between data held by the two memory cells can be maintained. Hence, differential amplification of such difference enables acquisition of proper stored information. Thus, retention performance of an electrically rewritable nonvolatile memory cell is improved.
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Aoki Yasunobu
Fujito Masamichi
Iwase Takashi
Kawada Kenji
Kurafuji Takashi
Mattingly & Malur, PC
Nguyen Tan T.
Renesas Electronics Corporation
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