1978-08-01
1981-04-07
Wojciechowicz, Edward J.
357 23, 357 41, 357 55, 357 59, 357 68, H01L 2702
Patent
active
042610044
ABSTRACT:
On the surface of an insulating film formed on the surface of a semiconductor substrate on which an MOS type semiconductor device to be protected is formed, there are formed a first polycrystal silicon member having input and output terminals and a resistivity lower than 1 K.OMEGA./.quadrature. and a second polycrystalline silicon member having a resistivity lower than 1 K.OMEGA./.quadrature. and being maintained at a fixed potential. This second polycrystalline silicon member faces at least a part of the first silicon member with polycrystalline silicon of a resistivity higher than 100 K.OMEGA./.quadrature. interposed therebetween. The input terminal of the first polycrystalline silicon member is connected to an input pad of the MOS type semiconductor device to be protected and the output terminal of the first polycrystalline silicon member is connected to an input gate of the semiconductor device to be protected. The input gate of the semiconductor device is protected by utilizing the punch-through effect in the interior of the polycrystalline silicon having a resistivity higher than 100 K.OMEGA./.quadrature..
REFERENCES:
patent: 4077044 (1978-02-01), Hayashi et al.
patent: 4110776 (1978-08-01), Rao et al.
Kubo Masaharu
Masuhara Toshiaki
Minato Osamu
Nishimura Kotaro
Sakai Yoshio
Hitachi , Ltd.
Wojciechowicz Edward J.
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