Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate
2011-03-08
2011-03-08
Dickey, Thomas L (Department: 2893)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified configuration
C257SE23142, C257SE21636
Reexamination Certificate
active
07902673
ABSTRACT:
A tooling method for fabricating semiconductor devices includes identifying two adjacent device lines having a device-to-device spacing width in an active region of a substrate, performing an operation to selectively define a first region as a region between the two adjacent device lines overlapping the active region, forming a first block pattern corresponding to the first region on a photomask when the device-to-device spacing width is equal to a predetermined value, and transferring the first block pattern to the substrate.
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patent: 2007/0003127 (2007-01-01), Nakano
patent: 2007/0034990 (2007-02-01), Chen
patent: 2007/0117375 (2007-05-01), Yang
Dickey Thomas L
Hsu Winston
Margo Scott
United Microelectronics Corp.
Yushin Nikolay
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