Semiconductor device

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration

Reexamination Certificate

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Details

C257SE23142, C257SE21636

Reexamination Certificate

active

07902673

ABSTRACT:
A tooling method for fabricating semiconductor devices includes identifying two adjacent device lines having a device-to-device spacing width in an active region of a substrate, performing an operation to selectively define a first region as a region between the two adjacent device lines overlapping the active region, forming a first block pattern corresponding to the first region on a photomask when the device-to-device spacing width is equal to a predetermined value, and transferring the first block pattern to the substrate.

REFERENCES:
patent: 5699299 (1997-12-01), Kim
patent: 6040592 (2000-03-01), McDaniel
patent: 6171732 (2001-01-01), Chen
patent: 6406819 (2002-06-01), Lin
patent: 6531393 (2003-03-01), Huang
patent: 2007/0003127 (2007-01-01), Nakano
patent: 2007/0034990 (2007-02-01), Chen
patent: 2007/0117375 (2007-05-01), Yang

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