Semiconductor device

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – Having specific type of active device

Reexamination Certificate

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Details

C257S365000, C257S371000, C257S392000, C257S407000, C257SE29134, C257SE29135, C257SE29136, C257SE21638

Reexamination Certificate

active

07910957

ABSTRACT:
A semiconductor device has a first and a second active regions of a first conductivity type disposed on a semiconductor substrate, a third and a fourth active regions of a second conductivity type disposed on the semiconductor substrate, the second and the fourth active regions having sizes larger than those of the first and the third active regions respectively, a first electroconductive pattern disposed adjacent to the first active region and having a first width, a second electroconductive pattern disposed adjacent to the second active region and having a second width larger than the first width, a third electroconductive pattern disposed adjacent to the third active region and having a third width; and a fourth electroconductive pattern disposed adjacent to the fourth active region and having a fourth width smaller than the third width.

REFERENCES:
patent: 7335561 (2008-02-01), Sakai et al.
patent: 2004/0238897 (2004-12-01), Oishi
patent: 2005/0189595 (2005-09-01), Okamoto et al.
patent: 2006/0027876 (2006-02-01), Jung et al.
patent: 2007/0087518 (2007-04-01), Ochi et al.
patent: 2008/0020523 (2008-01-01), Lee et al.
patent: 05-129533 (1993-05-01), None
patent: 2005-243928 (2005-09-01), None
patent: 2007-109966 (2007-04-01), None
H. Aikawa et al., “Variability Aware Modeling and Characterization in Standard Cell in 45 nm CMOS with Stress Enhancement Technique”, Symposium on VLSI Technology Digest of Technical Papers, 2008, pp. 90-91.

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