Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame – With dam or vent for encapsulant
Reexamination Certificate
1999-08-03
2001-07-31
Ngô, Ngân V. (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Lead frame
With dam or vent for encapsulant
C257S787000
Reexamination Certificate
active
06268644
ABSTRACT:
FIELD OF THE INVENTION
The present invention pertains to a resin-sealed semiconductor device, specifically, a semiconductor device that is equipped with a semiconductor chip, a lead that provides an exterior electrical connection to said device, and a fine wire for the electrical connection of these two members and is suitable in particular for preventing short circuits between wires when a mold resin is poured.
BACKGROUND OF THE INVENTION
In semiconductor manufacture technologies, a widely known method for electrically connecting a semiconductor chip to a conductor pattern (referred to below as a conductor lead) in which a semiconductor chip is formed on a lead frame or an insulating substrate, is a method using super fine wire bonding (including the thermocompression bonding method, the ultrasonic method, the thermosonic method in which the above-mentioned two methods are combined, etc.). During wire bonding, one end of gold (Au) and other super fine wires are bonded to electrode pads on the circuit forming surface of a semiconductor chip by a capillary tool and looped, that is, arranged so that they form loops. The other ends are bonded to the conductor leads.
One advantage of wire bonding is that mutual shrinkage between internal members of a semiconductor device due to heat is absorbed by the flexibility of the wires, so that high connection reliability is obtained. On the other hand, the flexibility of the wires is disadvantageous because short circuits between the wires can be generated when a molding resin is poured. Along with the demand for miniaturization and high performance of semiconductor devices, the number of wires per unit area has increased, and the short circuit problem between the wires becomes more serious when the molding resin is poured.
FIG. 9
is a conceptual diagram showing a resin flow in a mold
30
based on a transfer molding method. A melted molding resin is poured into a cavity
34
for forming semiconductor devices
10
and
20
shown in
FIGS. 1 and 6
from a gate
31
arranged at the corner. The molding resin flows from the corner where the gate
31
is arranged into the cavity
34
and toward the corner
35
that is diagonally opposite the gate. Here, since wires
32
extend radially from the electrode pads arranged around the semiconductor chip
33
in all directions, some wires, that is, the wires in the corners
34
′ in the cavity
34
on both sides of the gate receive the flow of the molding resin from an approximately perpendicular direction.
FIGS. 10 and 11
are enlarged diagrams showing one of the two side corners
34
′ in the cavity that receive a flow of molding resin that is approximately perpendicular to the wires
32
when the resin is poured from position A in
FIG. 9
, that is, the above-mentioned gate
31
. The two figures show the condition before and after the molding resin is poured. As shown in the figure, a conventional semiconductor device has the area
34
at the corner of the semiconductor chip
33
, where there is no electrode pad
33
a
. After a semiconductor device has been sealed with a molding resin, mechanical stresses are generated in a region with a size of about 200-400 &mgr;m in the corner (
33
′) of semiconductor chip (
33
), and cracks are generated in the silicon that is used as the substrate for the semiconductor chip
33
or connection defects are generated in the wire
32
, so that the reliability is lowered. For this reason, this design is disadvantageous for I/O buffer circuits, antistatic circuits (ESD circuits), electrode pads, etc. Therefore, as shown in the figure, the gap between the two closest wires
32
a
and
32
b
in the corner (
33
′) of the semiconductor chip is wider than the gap between the other wires.
As shown in
FIG. 11
, the arrow shows the direction of the flow of the molding resin poured from gate
31
, in the two corners
34
′, which are toward the sides with respect to the gate position of the cavity
34
, and the flow is approximately perpendicular to the direction of the wires
32
. The wires
32
resist the flow of the molding resin but the gap between the wires
32
a
and
32
b
in the two side corners in the cavity
34
is widened as mentioned above, so that the resistance is decreased, thereby accelerating the flow. For this reason, the wire
32
b
, which is downstream of this gap, receives a larger force and is largely deformed, so that the risk of short circuits with adjacent wires is increased.
Therefore, the purpose of the present invention is to prevent wires at the corner of a semiconductor chip from contacting adjacent wires due to the flow of a molding resin, that is, to prevent the short circuit of wires. Another purpose of the present invention is to prevent the short circuit of the above-mentioned adjacent wires with little change to the structure and the manufacturing processes of a semiconductor device.
SUMMARY OF THE INVENTION
The present invention pertains to a semiconductor device that contains wires and is sealed with a molding resin. The semiconductor device of the present invention is equipped with a semiconductor chip that has a row of electrode pads along the periphery of the principal plane, wires that extend from each above-mentioned electrode pad, a molding resin package material that covers at least the above-mentioned semiconductor chip and the above-mentioned wires and that forms the external shape of the semiconductor device, and dam members that are arranged between the two closest of the above-mentioned wires, which are arranged so that the corners of the above-mentioned semiconductor chip are in between the wires.
The flow of the molding resin in the corner of the semiconductor chip is suppressed by the above-mentioned dam members, and the deformation of wires downstream of the dams is decreased. As a result, short circuits between adjacent wires are avoided.
Here, the above-mentioned dam members may also be arranged between the wires in all the corners of the semiconductor chip; however, it is sufficient to position the dams in the corners adjacent to the corner of the above-mentioned semiconductor chip that is closest to a pouring gate when the molding resin is poured.
The above-mentioned dam members generate resistance against the flow of the molding resin, and various kinds of members can be fixed to the semiconductor chip, to the substrate on which said chip is mounted, and various parts can be used. However, an ideal embodiment of the dam members is to use at least one wire that is not electrically operated or used for electric conduction (referred to below as a dummy wire). Since the dummy wire can be bonded with other wires in a wire-bonding process, it is very advantageous in terms of manufacture.
One end of the above-mentioned dummy wire can be fixed to the electrode pad that is formed in the corner of the above-mentioned semiconductor chip and is not electrically operated.
Also, in case the semiconductor chip is arranged on a die pad, the above-mentioned dummy wire may also be fixed to the die pad. Also, the above-mentioned dummy wire may also be fixed to a die pad support pin.
Also, the second end of the above-mentioned dummy wire is preferably fixed near the point where the second end of the other wires is fixed.
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patent: 5304841 (1994-04-01), Negoro
patent: 5517056 (1996-05-01), Bigler et al.
patent: 5596225 (1997-01-01), Mathew et al.
patent: 5708294 (1998-01-01), Toriyama
patent: 5723899 (1998-03-01), Shin
patent: 5812381 (1998-09-01), Shigeta et al.
patent: 5982625 (1999-11-01), Chen et al.
patent: 5986333 (1999-11-01), Nakamura
patent: 6093959 (2000-07-01), Hong et al.
Imura Takahiro
Umeda Yoshikatsu
Umehara Norito
Kempler William B.
Ngo Ngan V.
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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