Semiconductor device

Details Semiconductor device Semiconductor device

2000-03-06

2001-10-16

Zarabian, Amir (Department: 2824)

Static information storage and retrieval

Powering

C365S189090

Reexamination Certificate

active

06304508

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device capable of providing more stabilization of a voltage for operating an internal circuit based on a source voltage supplied from outside the semiconductor device and reducing a chip area.
2. Description of the Related Art
An internal source voltage has heretofore been generated by an internal source voltage generating circuit (step-down or debooster circuit or the like) provided inside a semiconductor device, based on an external source voltage supplied by a constant voltage source from outside the semiconductor device. Further, a boosted voltage higher than the internal source voltage has been generated by a booster circuit based on the internal source voltage. These internal source voltage and boosted voltage have been used to drive an internal circuit (such as a memory cell, TTL (Transistor Transistor Logic) level input buffer circuit, a data output driver circuit) employed in the semiconductor device.
In the above-described semiconductor device, however, there may be cases in which when current is consumed by the internal circuit in the semiconductor device where the internal circuit is operated using the aforementioned internal source voltage and boosted voltage, a voltage drop is developed due to the impedance of the internal source voltage generating circuit, so that the internal source voltage and boosted voltage change. Thus, there has been provided a capacitor for voltage stabilization between a node placed between the internal source voltage generating circuit and the internal circuit and a ground voltage with a view toward stabilizing the internal source voltage and the boosted voltage. A capacitor having a MOS type structure wherein a gate oxide film used for a MOS (Metal Oxide Semiconductor) transistor is used as an insulator, has been used as such a capacitor. In the capacitor having such a MOS type structure, a gate electrode thereof is electrically connected to a node provided between an internal source voltage generating circuit and an internal circuit, and a source and drain thereof are both electrically connected to a ground voltage. On the other hand, since different driving source voltages are respectively applied to an N type well for each memory cell and an N type well for a peripheral circuit, both the N type wells have physically been separated from each other.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a semiconductor device capable of improving the stabilization of an internal source voltage employed in the semiconductor device while controlling an increase in the area of a chip employed in the semiconductor device.
In order to achieve the above object, there is provided a semiconductor device according to the present invention, comprising a debooster circuit for generating an internal source voltage lower than an external source voltage, based on the external source voltage inside the semiconductor device, a booster circuit for generating a boosted voltage higher than the internal source voltage, based on the internal source voltage, a first conduction type semiconductor substrate supplied with a ground voltage, a second conduction type first well region formed within the semiconductor substrate and supplied with the boosted voltage, a first conduction type second well region formed within the first well region, and memory cells formed over the second well region.
Further, in order to achieve the above object, there is provided a semiconductor device according to the present invention, comprising a debooster circuit for generating an internal source voltage lower than an external source voltage, based on the external source voltage inside the semiconductor device, a booster circuit for generating a boosted voltage higher than the internal source voltage, based on the internal source voltage, a first conduction type semiconductor substrate supplied with a ground voltage, a second conduction type first well region formed within the semiconductor substrate and supplied with the boosted voltage, a first conduction type second well region formed within the first well region, memory cells formed over the second well region, a first conduction type third well region formed within the first well region and supplied with the ground voltage, and peripheral circuits formed over the first and third well regions and disposed on the periphery of each memory cell.
Typical ones of various inventions of the present application have been shown in brief. However, the various inventions of the present application and specific configurations of these inventions will be understood from the following description.


REFERENCES:
patent: 5510749 (1996-04-01), Arimoto
patent: 5805508 (1998-09-01), Tobita
patent: 5905679 (1999-05-01), Tsukikawa
patent: 6031779 (2000-02-01), Takahashi et al.

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