Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads
Reexamination Certificate
1999-08-04
2001-09-11
Graybill, David E. (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Bump leads
C257S738000, C257S778000
Reexamination Certificate
active
06288445
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device having a semiconductor chip, and a process for producing the same, and in particular to a semiconductor device having a structure wherein a groove or holes are made in a substrate on which bumps for electrical connection from its back surface are formed, i.e., a substrate for bumps, and/or in an adhesive for bonding the substrate for the bumps to a semiconductor chip, and a process for producing the same.
2. Description of the Related Art
Recently, the number of external terminals in semiconductor devices has increased with an increase in the integration degree thereof. In some cases of semiconductor devices having such a high integration degree, a semiconductor chip is not directly mounted on a substrate but is mounted on a substrate through a substrate for bumps, such as a tape on which solder bumps are formed.
FIG. 1A
is a plan view illustrating a structure of a semiconductor device in a prior art, and
FIG. 1B
is a cross section taken on F—F line of FIG.
1
A.
As shown in
FIGS. 1A and 1B
, a semiconductor chip
700
is connected to a tape
400
as a substrate for bumps with an adhesive
600
. Electrodes
300
a
are formed at the external terminal side of the tape
400
, and electrodes
300
b
are formed at the side of the semiconductor chip
700
thereof. Each of the electrodes
300
a
is connected to each of the electrodes
300
b
through a wiring circuit arranged inside the tape
400
.
Electrodes
300
c
are formed at the tape
400
side of the semiconductor chip
700
. The electrodes
300
b
are connected to the electrodes
300
c
through bumps
500
. An adhesive agent
600
is injected into the region between the semiconductor chip
700
and the tape
400
after the connection of the electrodes through the bumps
500
. Solder balls
200
are formed on the electrodes
300
a
of the tape
400
. This semiconductor device is mounted on a substrate (not shown) through the solder balls
200
.
In the semiconductor device having the above-mentioned structure, the area where the solder balls are mounted becomes large if the number of the solder bumps, which are external terminals, increases. Therefore, if the semiconductor device is mounted on the substrate and subsequently stress is generated by a change in temperature, there arises a problem that the solder balls
200
subjected to the stress are broken so as to become open inferiority.
Such stress is generated by the difference in the thermal expansion coefficients between the semiconductor device and the substrate on which the semiconductor device is mounted. When the change in temperature is generated by the operation of the semiconductor device so that its temperature rises, the semiconductor device and the substrate expand. When the temperature falls, the semiconductor and the substrate contract. In these cases, if the thermal expansion coefficients of the substrate and the semiconductor device are different from each other, the degrees of the expansion and contraction are different. In general, the substrate expands and contracts more greatly than the semiconductor device. When such expansion and contraction are repeated many times, stress is structurally concentrated mainly in joint portions of the solder balls
200
. For this reason, the solder balls
200
are broken to become open inferiority.
A semiconductor device for overcoming such drawbacks is proposed (Japanese Patent Application Laid-Open No. Hei 8-55875, published on Feb. 27, 1996).
FIG. 2
is a cross section illustrating a structure of a semiconductor device, in the prior art, disclosed in the Japanese Patent Application Laid-Open No. Hei 8-55875.
FIG. 3
is a plan view illustrating a mounting structure of a semiconductor chip and a package substrate in the semiconductor device illustrated in FIG.
2
.
In the semiconductor device disclosed in this publication, a package substrate
410
, which is a substrate for bumps and on which a semiconductor chip
710
is mounted, is divided into 4 pieces. The semiconductor chip
710
is mounted on a module substrate
800
through the package substrates
410
. The whole of the semiconductor chip
710
, including bump electrodes
510
, is packaged and fixed by means of a molding resin
610
. The four package substrates
410
and the module substrate
800
are connected to each other through bump electrodes
210
.
According to the semiconductor device in the prior art, disclosed in the above-mentioned publication, the package substrate, on which the semiconductor chip
710
is mounted is divided into the 4 package substrates
410
; therefore, the maximum distance L
1
between the bumps is not more than ½of the maximum distance L
0
between the bumps in the case that the package substrate is not divided, as illustrated in FIG.
3
. This results in reduction in strain which is applied to the bump electrodes
510
by a change in temperature.
However, even if the package substrate is composed of the 4 divided package substrates
410
, regions between the package substrates
410
are embedded by the molding resin
610
. Accordingly, these are substantially integrated with each other. For this reason, the stress based in the change in temperature is transmitted through the molding resin
610
by which the regions between the 4 package substrates
410
are embedded, so that the strain applied to the bump electrodes
510
is not sufficiently reduced.
According to the above-mentioned publication, no consideration is given to the reduction in the stress based on the temperature-change between the package substrates
410
and the module substrate
800
.
In order to mount the semiconductor chip
710
on the 4 package substrates
410
resulting from the division, the following steps are necessary: the step of positioning the 4 package substrates
410
to each other at a given interval, the step of mounting the semiconductor device
710
under the condition that the distance between the respective package substrates
410
is kept and fixed, and the step of packaging the semiconductor device
710
by means of the molding resin
610
. However, it is very difficult to position the divided package substrates to each other. Moreover, there remains a problem that the mounting requires much time since the number of the steps increases.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a semiconductor device, having a semiconductor chip and a substrate for bumps (i.e., bump-substrate), making it possible to disperse easily stress based on the difference in thermal expansion coefficients between them and a substrate on which they are to be mounted; and a process for producing the same.
According to one aspect of the present invention, a semiconductor device may comprise a substrate for bumps having a first and a second surfaces. The substrate for bumps may have at least one groove or a plurality of holes formed at the first surface. The semiconductor device may comprise a semiconductor chip mounted on the second surface of the substrate for bumps, an adhesive which bonds the semiconductor chip and the substrate for bumps, and a plurality of bumps formed on the first surface of the substrate for bumps.
According to one aspect of the present invention, the groove or the holes are made in the first surface; therefore, the groove or the holes make it possible to relieve the stress concentrically generated in the bumps of the substrate for bumps by temperature-change after the semiconductor device is mounted on a substrate. Therefore, it is possible to relieve the stress applied to the joint portions of the bumps by temperature-change after the semiconductor device is mounted on the substrate such as a printed wiring board, and prolong the lifetime of the joint portions of the bumps. As a result, the reliability of the semiconductor device can be improved.
In the present invention, the substrate for bumps may be defined into a plurality of areas by the groove. In this case, the stress can be relieved more
Graybill David E.
NEC Corporation
Young & Thompson
LandOfFree
Semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2479547