Active solid-state devices (e.g. – transistors – solid-state diode – Specified wide band gap semiconductor material other than... – Diamond or silicon carbide
Reexamination Certificate
1999-09-15
2001-06-12
Mintel, William (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Specified wide band gap semiconductor material other than...
Diamond or silicon carbide
C257S076000
Reexamination Certificate
active
06246077
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device including a device region formed in an epitaxial layer, and more particularly to a semiconductor device formed of a material, such as SiC, which is liable to cause surface scattering.
Conventionally, MOS transistors are generally used in semiconductor devices. In particular, Si-based MOS transistors are used in various types of semiconductor devices.
There is a demand for an MOS transistor, wherein the withstand voltage is high and the base is thin, to be used in semiconductor devices having a high withstand voltage. As an MOS transistor which meets the demand, a SiC-based MOS transistor is expected, since the thickness of a SiC-based MOS transistor for a given voltage can be about {fraction (1/10)} of that of a Si-based MOS transistor.
However, this type of MOS transistor has the following drawback: the mobility of carriers in a channel region (channel mobility) is much lower than that in the bulk SiC, resulting in high ON resistance.
The cause of the drawback is as follows. Since SiC cannot be easily polished by chemical mechanical polishing (CMP), great roughness remains on the surface of SiC after polishing. For this reason, when a gate oxide film is formed on the surface of SiC polished to a predetermined thickness, the channel mobility is reduced by surface-roughness scattering on the interface between the gate oxide film and SiC. Further, a number of dangling bonds due to the lattice structure exist on the surface of SiC, so that the channel mobility is reduced by coulomb scattering on the MOS interface. As a result, the channel mobility is very low, and the ON resistance is high.
In general, to grow an epitaxial layer, the semiconductor substrate is polished so that the substrate is misoriented &thgr; degree from the low index direction axis, and an epitaxial layer is formed on the polished off-axis surface of the substrate. This is because a monocrystalline layer including few crystal defects can be obtained by forming a step structure on the surface of a substrate and epitaxially growing monocrystal on the step surface. However, it is known that the greater the off-axis angle &thgr;, the lower the effective channel mobility due to scattering caused by the steps, and the greater the ON resistance.
If the substrate is-made of Si, since the off-axis angle is generally set smaller than 1°, the number of steps is small. Hence, the channel mobility is not practically reduced. However, in the case of SiC, the off-axis angle is set to about 4° for step-controlled epitaxy and the steps are steep due to a characteristic periodical structure of the hexagonal system. As a result, the step density becomes large and thus considerable scattering occurs. Thus, the effective channel mobility is reduced to an extent which cannot practically be ignored, and the ON resistance is increased.
Further, if the surface of the epitaxial layer makes an angle with a crystal surface along a low index number direction macroscopically, and if a trench is formed without taking the direction thereof into consideration, the side wall of the trench is inevitably deviated from the crystal surface along the low index number direction. As a result, the lattice structure on the side wall is disordered and a number of dangling bonds are generated. For this reason, when a current path is formed on the side wall of the trench, the following problem is raised: the surface scattering becomes greater due to surface-roughness scattering and coulomb scattering, and the ON resistance is increased.
BRIEF SUMMARY OF THE INVENTION
An object of the present invention is to provide an insulated-gate type semiconductor device wherein the channel mobility can be prevented from decreasing, even if the substrate is made of a material such as SiC, in which great roughness and a number of dangling bonds are generated on the surface thereof.
Another object of the present invention is to provide a semiconductor device having a small ON resistance, which is formed on a monocrystalline semiconductor layer epitaxially grown on a semiconductor substrate polished to have a tilt angle to the low index number direction axis.
To achieve the aforementioned objects, a semiconductor device according to a first aspect of the present invention comprises: a first semiconductor layer of a first conductivity type having a surface; a second semiconductor layer of the first conductivity type formed on the surface of the first semiconductor layer, the energy difference between the bottom of a conductive band and the vacuum level in the second semiconductor layer being smaller than that in the first semiconductor layer; a gate electrode formed above the second semiconductor layer with a gate insulating film interposed therebetween; and a pair of third semiconductor layers of the second conductivity type, being in contact with at least the first semiconductor layer and faced each other in a region of the surface of the first semiconductor layer, so that a channel region is formed under the gate electrode.
The second semiconductor layer may be formed only under the gate electrode.
In the semiconductor device, one of the third semiconductor layers may be made of a semiconductor substrate of the second conductivity type; the first semiconductor layer may be formed on the semiconductor substrate; the other of the third semiconductor layers may be formed on the first semiconductor layer; the second semiconductor layer may be formed on an inner surface of a trench extending from a surface of the other of the third semiconductor layer to the semiconductor substrate; and the gate electrode may be buried in the trench with the gate insulating film interposed therebetween.
The second semiconductor layer may be formed only on the portion of the first semiconductor layer exposed to the trench.
It is preferable that the first and second semiconductor layers be made of materials selected from the group consisting of combinations: (4H—SiC, GaN); (4H—SiC, Diamond); (6H—SiC, 4H—SiC); (6H—SiC, GaN); (6H—SiC, Diamond); (3C—SiC, 4H—SiC); (3C—SiC, 6H—SiC); (3C—SiC, GaN); and (3C—SiC, Diamond).
According to the present invention, the gate insulating film is not directly formed on the first semiconductor layer, but on the second semiconductor layer formed on the first semiconductor layer. In addition, near the channel region defined by the gate electrode, the energy difference between the bottom of the conductive band and the vacuum level in the second semiconductor layer is smaller than that in the first semiconductor layer.
Therefore, when a voltage exceeding the threshold voltage is applied to the gate electrode, a channel of the second conductivity type is formed near the interface between the first and second semiconductor layers, and not near the interface between the gate insulating film and the second semiconductor layer (MOS interface). Therefore, even if the second semiconductor layer is made of SiC, in which a number of dangling bonds are formed in the interface between the gate insulating film and the second semiconductor layer, the reduction in carrier mobility can be suppressed.
A semiconductor device according to a second aspect of the present invention comprises: a first semiconductor layer of a first conductivity type; a second semiconductor layer of the first conductivity type formed on the first semiconductor layer, the energy difference between the bottom of the conductive band and the vacuum level in the second semiconductor layer being smaller than that in the first semiconductor layer; a gate electrode formed above the second semiconductor layer with a gate insulating film interposed therebetween;-a first diffusion layer of the first conductivity type formed on one side of the gate electrode, the first diffusion layer extending from a surface of the second semiconductor layer to the first semiconductor layer; and a second diffusion layer of the second conductivity type continuously formed in the first and second semiconductor layers, the second diffusion layer inclu
Inoue Tomoki
Kobayashi Setsuko
Shinohe Takashi
Yahata Akihiro
Kabushiki Kaisha Toshiba
Mintel William
Nadav Ori
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
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