1986-03-27
1988-02-16
Edlow, Martin H.
357 71, 357 72, 357 74, H01L 3902
Patent
active
047258780
ABSTRACT:
A semiconductor device provided with signal lines which connect a chip, provided at a top portion of a package, with external terminals provided at a bottom portion of the package. The signal lines have portions formed along side surfaces of the package. Ground surfaces are formed at predetermined distances on two sides of the high-speed signal lines. A coplanar waveguide is formed by the high-speed signal lines and the ground surfaces, so the impedance of vertical portions of the high-speed signal lines is matched to the circuits connected thereto.
REFERENCES:
patent: 3628105 (1971-12-01), Sakai et al.
patent: 3777221 (1973-12-01), Tatusko et al.
patent: 4667219 (1987-05-01), Lee et al.
patent: 4667220 (1987-05-01), Lee et al.
Emori Shinji
Kitasagami Hiroo
Miyauchi Akira
Nishimoto Hiroshi
Okiyama Tadashi
Edlow Martin H.
Fujitsu Limited
Key Gregory A.
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