Semiconductor device

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357 234, 357 238, 357 239, H01L 1114

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049281631

ABSTRACT:
A semiconductor device formed in a semiconductor substrate and having a gate electrode formed on the semiconductor substrate, source and drain regions are formed in said the semiconductor substrate. The source and drain regions are made of a first impurity region doped with impurities of an opposite conductivity type to that of a semiconductor substrate formed at portions adjacent to the edge of the gate electrode, a second impurity region doped with impurities of an opposite conductivity type to that of a semiconductor substrate formed at portions under the first impurity region, and a third impurity region doped with impurities of opposite conductivity type to that of a semiconductor substrate formed at portions spaced apart from the edge of the gate electrode. The impurities of the second impurity region have a diffusion coefficient larger than that of the impurities of the first impurity region. The third impurity region has a higher concentration than that of the first and the second impurity regions and in addition the impurities of the third impurity region have a diffusion coefficient smaller than that of the second impurity region.

REFERENCES:
patent: 4172260 (1979-10-01), Okabe et al.
patent: 4560582 (1985-12-01), Ichikawa
patent: 4680603 (1987-07-01), Wei et al.
Balasubramanyam, K., et al., "Characterization of As-P Double Diffused Drain Structure" IEDM 84, pp. 782-785, Dec. 1984.
Hsia, S., et al., "Polysilicon Oxidation Self-Aligned MOS(POSA MOS) . . . " IEEE Elec. Dev. Lett. vol. EDL-3, No. 2, Feb. 1982, pp. 40-42.
IEEE Transactions on Electron Devices, vol. Ed-29, No. 4, Apr. 1982, pp. 590-596, New York, TSANG et al.: "Fabrication of High-Performance LDDFET'S With Oxide Sidewall-Spacer Technology".
IEEE Transactions On Electron Devices, vol. ED-30, No. 6, Jun. 1983, pp. 652-657, New York, E. Takeda et al.: "An AS-P(n+-n-) Double Diffused Drain MOSFET for VLSI's".
IEEE Transactions On Electron Devices, vol. ED-32, No. 3, Mar. 1985, pp. 562-570, New York, M. Koyanagi et al.: "Optimum Design of n+-n-Double-Diffused Drain MOSFET to Reduce Hot-Carrier Emission".
Patents Abstracts of Japan, vol. 10, No. 42 (E-382) [2099], 19th Feb., 1986 & JP-A-60 198 780 (Seiko Denshi Kogyo K.K.) 08-10-1985.
Patents Abstracts Of Japan, vol. 10, No. 91 (E-394) [2148], Apr. 9, 1986; & JP-A-60 234 367 (Hitachi Seisakusho K.K.) 21-11-1985.
Patents Abstracts Of Japan, vol. 9, No. 298 (E-361) [2021], 26 Nov. 1985; & JP-A-60 136 376 (Hitachi Seisakusho K.K.) 19-07-1985.
European Search Report, The Hague, 9-11-86.

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