Semiconductor device

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357 86, 357 43, H01L 2974

Patent

active

048110728

ABSTRACT:
In both lateral and vertical gate turn off devices, the P anode emitter efficiency is controlled by a monolithic N channel device. Bipolar control is effected by connecting an electrode to the region that, in the MOS control mode, would have a dielectric layer disposed between it and the MOS gate. In combination with the P anode emitter control, several structures for controlling the cathode N emitter efficiency are disclosed.

REFERENCES:
patent: 4558243 (1985-12-01), Schutten
patent: 4611235 (1986-09-01), Bhagat
patent: 4630092 (1986-12-01), Bhagat
patent: 4636830 (1987-01-01), Bhagat
patent: 4646117 (1987-02-01), Temple
patent: 4730208 (1988-03-01), Sugino
Electronic Design, vol. 4, Feb. 15, 1978, pp. 32-34 by Barnes.

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