Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...
Patent
1997-02-05
1999-01-12
Meier, Stephen
Active solid-state devices (e.g., transistors, solid-state diode
Non-single crystal, or recrystallized, semiconductor...
Field effect device in non-single crystal, or...
257 67, 257347, H01L 2976, H01L 31036, H01L 31112, H01L 2701
Patent
active
058594442
ABSTRACT:
A semiconductor device is an SRAM cell having a pair of access transistors, a pair of driver transistors and a pair of load transistors. A gate electrode of the load transistor is electrically connected to a region of a semiconductor substrate which is surrounded by a gate electrode of the driver transistor, a channel region of the load transistor is formed opposite to the gate electrode of the load transistor with an insulating film therebetween, and a pair of source/drain regions of the load transistor are formed to sandwich the channel region.
REFERENCES:
International Electron Devices Meeting, 1990, San Francisco, California, Dec. 9-12. 1990 pp. 18.3.1-18.3.4.
"256 kbit CMOS EPROM HN27C256", Hideaki Takahashi et al., 8297 Hitachi Review, vol. 34, No. 6, Dec., 1985, pp. 295-298.
"A 5.9um.sup.2 Super Low Power SRAM Cell Using a New Phase-Shift Lithography" T. Yamanaka et al., IEDM 1990, pp. 477-480.
"A Large Cell-Ratio and Low Node Leak 16M-bit SRAM Cell Using Ratio-Gate Transistors", K. Yuzuriha et al., IEDM 1991, pp. 485-488.
T. Yamanaka et al., "A 5.9 .mu.m.sup.2 Super Low Power SRAM Cell Using a New Phase-Shift Lithography," International Electron Devices Meeting, San Francisco, CA, Dec. 9-12, 1990, Dec. 9, 1990, No. 90, Institute of Electrical and Electronics Engineers, pp. 477-480.
Manabu Ando et al., "A 0.1-.mu. A Standby Current, Ground-Bounce-Immune 1 Mbit CMOS SRAM," IEEE Journal of Solid-State Circuits, vol. 24, No. 6, Dec. 1, 1989, pp. 1708-1712.
T. Yamanaka et al., "A 25 .mu.m.sup.2, New Poly-Si PMOS Load (PPL) SRAM Cell Having Excellent Soft Error Immnnity," Electron Devices, San Francisco, CA, Dec. 11-14, 1988, Institute of Electrical and Electronics Engineers, No. 1988, Dec. 11, 1988, pp. 48-51.
Kohno Yoshio
Kuriyama Hirotada
Okada Teruhiko
Meier Stephen
Mitsubishi Denki & Kabushiki Kaisha
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