1985-02-01
1987-07-14
James, Andrew J.
357 34, 357 20, H01L 2972
Patent
active
046806083
ABSTRACT:
This application describes a semiconductor device having a power amplifier pattern consisting of a plurality of parallel-connected transistor unit cells with emitters thereof being arrayed like meshes, wherein the width of the emitter of each transistor unit cell is not in excess of 50 microns. The limitation of the emitter width contributes to enhancement of the reverse-bias breakdown endurance.
REFERENCES:
patent: 3911473 (1975-10-01), Nienhujs
patent: 4054897 (1977-10-01), Fukuda
patent: 4506280 (1985-03-01), Merrill
patent: 4586072 (1986-04-01), Nakatani
Toyoshima Shoji
Tsuzuki Yukio
Yamaoka Masami
James Andrew J.
Nippondenso Co. Ltd.
Prenty Mark
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