1988-02-17
1990-11-06
LaRoche, Eugene R.
357 42, 357 43, 357 48, H01L 2978, H01L 2702, H01L 2704
Patent
active
049690205
ABSTRACT:
An improved semiconductor device having a vertical MOS and another MOS circuit such as C-MOS is shown. To insulate the circuit from influences from the operation of the vertical MOS, the vertical MOS is fabricated in a diffused region which is formed on a semiconductor substrate while the circuit is fabricated in an epitaxial layer of an opposite conductivity type to that of the substrate.
REFERENCES:
patent: 4325180 (1982-04-01), Curran
patent: 4546370 (1985-10-01), Curran
patent: 4608584 (1986-08-01), Mihara
patent: 4628341 (1986-12-01), Thomas
patent: 4725561 (1988-02-01), Haond et al.
IEDM 83, "Integrated Circuits for the Control of High Power", by Robert Wrathall et al., 1983, pp. 408-411.
Matsushita Tsutomu
Murakami Koichi
LaRoche Eugene R.
Nissan Motor Company Limited
Singleton Michael B.
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